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@ -2,16 +2,25 @@ |
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include <stack>
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#include <boost/range/algorithm.hpp>
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#include <common/file_util.h>
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#include <core/mem_map.h>
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#include "debug_utils/debug_utils.h"
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#include <nihstro/shader_bytecode.h>
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#include "pica.h"
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#include "vertex_shader.h"
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#include "debug_utils/debug_utils.h"
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using nihstro::Instruction; |
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using nihstro::RegisterType; |
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using nihstro::SourceRegister; |
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using nihstro::SwizzlePattern; |
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namespace Pica { |
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@ -19,13 +28,14 @@ namespace VertexShader { |
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static struct { |
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Math::Vec4<float24> f[96]; |
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} shader_uniforms; |
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std::array<bool,16> b; |
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} shader_uniforms; |
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// TODO: Not sure where the shader binary and swizzle patterns are supposed to be loaded to!
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// For now, we just keep these local arrays around.
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static u32 shader_memory[1024]; |
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static u32 swizzle_data[1024]; |
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static std::array<u32, 1024> shader_memory; |
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static std::array<u32, 1024> swizzle_data; |
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void SubmitShaderMemoryChange(u32 addr, u32 value) |
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{ |
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@ -42,6 +52,21 @@ Math::Vec4<float24>& GetFloatUniform(u32 index) |
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return shader_uniforms.f[index]; |
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} |
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bool& GetBoolUniform(u32 index) |
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{ |
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return shader_uniforms.b[index]; |
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} |
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const std::array<u32, 1024>& GetShaderBinary() |
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{ |
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return shader_memory; |
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} |
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const std::array<u32, 1024>& GetSwizzlePatterns() |
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{ |
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return swizzle_data; |
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} |
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struct VertexShaderState { |
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u32* program_counter; |
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@ -49,13 +74,23 @@ struct VertexShaderState { |
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float24* output_register_table[7*4]; |
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Math::Vec4<float24> temporary_registers[16]; |
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bool status_registers[2]; |
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bool conditional_code[2]; |
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// Two Address registers and one loop counter
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// TODO: How many bits do these actually have?
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s32 address_registers[3]; |
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enum { |
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INVALID_ADDRESS = 0xFFFFFFFF |
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}; |
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u32 call_stack[8]; // TODO: What is the maximal call stack depth?
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u32* call_stack_pointer; |
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struct CallStackElement { |
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u32 final_address; |
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u32 return_address; |
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}; |
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// TODO: Is there a maximal size for this?
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std::stack<CallStackElement> call_stack; |
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struct { |
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u32 max_offset; // maximum program counter ever reached
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@ -64,49 +99,105 @@ struct VertexShaderState { |
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}; |
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static void ProcessShaderCode(VertexShaderState& state) { |
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// Placeholder for invalid inputs
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static float24 dummy_vec4_float24[4]; |
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while (true) { |
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bool increment_pc = true; |
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if (!state.call_stack.empty()) { |
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if (state.program_counter - shader_memory.data() == state.call_stack.top().final_address) { |
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state.program_counter = &shader_memory[state.call_stack.top().return_address]; |
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state.call_stack.pop(); |
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// TODO: Is "trying again" accurate to hardware?
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continue; |
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} |
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} |
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bool exit_loop = false; |
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const Instruction& instr = *(const Instruction*)state.program_counter; |
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state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + (state.program_counter - shader_memory)); |
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const float24* src1_ = (instr.common.src1 < 0x10) ? state.input_register_table[instr.common.src1.GetIndex()] |
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: (instr.common.src1 < 0x20) ? &state.temporary_registers[instr.common.src1.GetIndex()].x |
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: (instr.common.src1 < 0x80) ? &shader_uniforms.f[instr.common.src1.GetIndex()].x |
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: nullptr; |
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const float24* src2_ = (instr.common.src2 < 0x10) ? state.input_register_table[instr.common.src2.GetIndex()] |
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: &state.temporary_registers[instr.common.src2.GetIndex()].x; |
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float24* dest = (instr.common.dest < 0x08) ? state.output_register_table[4*instr.common.dest.GetIndex()] |
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: (instr.common.dest < 0x10) ? nullptr |
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: (instr.common.dest < 0x20) ? &state.temporary_registers[instr.common.dest.GetIndex()][0] |
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: nullptr; |
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const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.common.operand_desc_id]; |
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const bool negate_src1 = (swizzle.negate != 0); |
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float24 src1[4] = { |
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src1_[(int)swizzle.GetSelectorSrc1(0)], |
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src1_[(int)swizzle.GetSelectorSrc1(1)], |
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src1_[(int)swizzle.GetSelectorSrc1(2)], |
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src1_[(int)swizzle.GetSelectorSrc1(3)], |
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auto call = [&](VertexShaderState& state, u32 offset, u32 num_instructions, u32 return_offset) { |
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state.program_counter = &shader_memory[offset] - 1; // -1 to make sure when incrementing the PC we end up at the correct offset
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state.call_stack.push({ offset + num_instructions, return_offset }); |
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}; |
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if (negate_src1) { |
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src1[0] = src1[0] * float24::FromFloat32(-1); |
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src1[1] = src1[1] * float24::FromFloat32(-1); |
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src1[2] = src1[2] * float24::FromFloat32(-1); |
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src1[3] = src1[3] * float24::FromFloat32(-1); |
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} |
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const float24 src2[4] = { |
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src2_[(int)swizzle.GetSelectorSrc2(0)], |
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src2_[(int)swizzle.GetSelectorSrc2(1)], |
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src2_[(int)swizzle.GetSelectorSrc2(2)], |
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src2_[(int)swizzle.GetSelectorSrc2(3)], |
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u32 binary_offset = state.program_counter - shader_memory.data(); |
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state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + binary_offset); |
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auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* { |
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switch (source_reg.GetRegisterType()) { |
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case RegisterType::Input: |
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return state.input_register_table[source_reg.GetIndex()]; |
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case RegisterType::Temporary: |
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return &state.temporary_registers[source_reg.GetIndex()].x; |
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case RegisterType::FloatUniform: |
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return &shader_uniforms.f[source_reg.GetIndex()].x; |
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default: |
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return dummy_vec4_float24; |
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} |
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}; |
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switch (instr.opcode) { |
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switch (instr.opcode.GetInfo().type) { |
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case Instruction::OpCodeType::Arithmetic: |
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{ |
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bool is_inverted = 0 != (instr.opcode.GetInfo().subtype & Instruction::OpCodeInfo::SrcInversed); |
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if (is_inverted) { |
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// TODO: We don't really support this properly: For instance, the address register
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// offset needs to be applied to SRC2 instead, etc.
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// For now, we just abort in this situation.
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LOG_CRITICAL(HW_GPU, "Bad condition..."); |
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exit(0); |
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} |
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const int address_offset = (instr.common.address_register_index == 0) |
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? 0 : state.address_registers[instr.common.address_register_index - 1]; |
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const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted) + address_offset); |
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const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted)); |
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const bool negate_src1 = (swizzle.negate_src1 != false); |
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const bool negate_src2 = (swizzle.negate_src2 != false); |
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float24 src1[4] = { |
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src1_[(int)swizzle.GetSelectorSrc1(0)], |
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src1_[(int)swizzle.GetSelectorSrc1(1)], |
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src1_[(int)swizzle.GetSelectorSrc1(2)], |
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src1_[(int)swizzle.GetSelectorSrc1(3)], |
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}; |
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if (negate_src1) { |
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src1[0] = src1[0] * float24::FromFloat32(-1); |
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src1[1] = src1[1] * float24::FromFloat32(-1); |
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src1[2] = src1[2] * float24::FromFloat32(-1); |
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src1[3] = src1[3] * float24::FromFloat32(-1); |
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} |
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float24 src2[4] = { |
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src2_[(int)swizzle.GetSelectorSrc2(0)], |
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src2_[(int)swizzle.GetSelectorSrc2(1)], |
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src2_[(int)swizzle.GetSelectorSrc2(2)], |
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src2_[(int)swizzle.GetSelectorSrc2(3)], |
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}; |
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if (negate_src2) { |
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src2[0] = src2[0] * float24::FromFloat32(-1); |
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src2[1] = src2[1] * float24::FromFloat32(-1); |
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src2[2] = src2[2] * float24::FromFloat32(-1); |
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src2[3] = src2[3] * float24::FromFloat32(-1); |
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} |
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float24* dest = (instr.common.dest < 0x08) ? state.output_register_table[4*instr.common.dest.GetIndex()] |
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: (instr.common.dest < 0x10) ? dummy_vec4_float24 |
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: (instr.common.dest < 0x20) ? &state.temporary_registers[instr.common.dest.GetIndex()][0] |
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: dummy_vec4_float24; |
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id); |
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switch (instr.opcode.EffectiveOpCode()) { |
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case Instruction::OpCode::ADD: |
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{ |
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id); |
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for (int i = 0; i < 4; ++i) { |
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if (!swizzle.DestComponentEnabled(i)) |
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continue; |
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@ -119,7 +210,6 @@ static void ProcessShaderCode(VertexShaderState& state) { |
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case Instruction::OpCode::MUL: |
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{ |
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id); |
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for (int i = 0; i < 4; ++i) { |
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if (!swizzle.DestComponentEnabled(i)) |
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continue; |
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@ -130,10 +220,18 @@ static void ProcessShaderCode(VertexShaderState& state) { |
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break; |
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} |
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case Instruction::OpCode::MAX: |
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for (int i = 0; i < 4; ++i) { |
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if (!swizzle.DestComponentEnabled(i)) |
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continue; |
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dest[i] = std::max(src1[i], src2[i]); |
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} |
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break; |
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case Instruction::OpCode::DP3: |
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case Instruction::OpCode::DP4: |
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{ |
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id); |
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float24 dot = float24::FromFloat32(0.f); |
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int num_components = (instr.opcode == Instruction::OpCode::DP3) ? 3 : 4; |
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for (int i = 0; i < num_components; ++i) |
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@ -151,7 +249,6 @@ static void ProcessShaderCode(VertexShaderState& state) { |
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// Reciprocal
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case Instruction::OpCode::RCP: |
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{ |
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id); |
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for (int i = 0; i < 4; ++i) { |
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if (!swizzle.DestComponentEnabled(i)) |
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continue; |
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@ -167,7 +264,6 @@ static void ProcessShaderCode(VertexShaderState& state) { |
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// Reciprocal Square Root
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case Instruction::OpCode::RSQ: |
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{ |
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id); |
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for (int i = 0; i < 4; ++i) { |
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if (!swizzle.DestComponentEnabled(i)) |
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continue; |
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@ -180,9 +276,21 @@ static void ProcessShaderCode(VertexShaderState& state) { |
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break; |
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} |
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case Instruction::OpCode::MOVA: |
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{ |
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for (int i = 0; i < 2; ++i) { |
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if (!swizzle.DestComponentEnabled(i)) |
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continue; |
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// TODO: Figure out how the rounding is done on hardware
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state.address_registers[i] = static_cast<s32>(src1[i].ToFloat32()); |
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} |
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break; |
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} |
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case Instruction::OpCode::MOV: |
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{ |
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id); |
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for (int i = 0; i < 4; ++i) { |
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if (!swizzle.DestComponentEnabled(i)) |
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continue; |
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@ -192,39 +300,137 @@ static void ProcessShaderCode(VertexShaderState& state) { |
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break; |
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} |
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case Instruction::OpCode::RET: |
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if (*state.call_stack_pointer == VertexShaderState::INVALID_ADDRESS) { |
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exit_loop = true; |
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} else { |
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// Jump back to call stack position, invalidate call stack entry, move up call stack pointer
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state.program_counter = &shader_memory[*state.call_stack_pointer]; |
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*state.call_stack_pointer-- = VertexShaderState::INVALID_ADDRESS; |
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case Instruction::OpCode::CMP: |
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for (int i = 0; i < 2; ++i) { |
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// TODO: Can you restrict to one compare via dest masking?
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auto compare_op = instr.common.compare_op; |
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auto op = (i == 0) ? compare_op.x.Value() : compare_op.y.Value(); |
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switch (op) { |
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case compare_op.Equal: |
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state.conditional_code[i] = (src1[i] == src2[i]); |
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break; |
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case compare_op.NotEqual: |
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state.conditional_code[i] = (src1[i] != src2[i]); |
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break; |
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case compare_op.LessThan: |
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state.conditional_code[i] = (src1[i] < src2[i]); |
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break; |
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case compare_op.LessEqual: |
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state.conditional_code[i] = (src1[i] <= src2[i]); |
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break; |
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case compare_op.GreaterThan: |
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state.conditional_code[i] = (src1[i] > src2[i]); |
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break; |
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case compare_op.GreaterEqual: |
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state.conditional_code[i] = (src1[i] >= src2[i]); |
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break; |
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default: |
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LOG_ERROR(HW_GPU, "Unknown compare mode %x", static_cast<int>(op)); |
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break; |
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} |
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} |
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break; |
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default: |
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LOG_ERROR(HW_GPU, "Unhandled arithmetic instruction: 0x%02x (%s): 0x%08x", |
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(int)instr.opcode.Value(), instr.opcode.GetInfo().name, instr.hex); |
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_dbg_assert_(HW_GPU, 0); |
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break; |
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} |
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break; |
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} |
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default: |
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// Handle each instruction on its own
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switch (instr.opcode) { |
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case Instruction::OpCode::END: |
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exit_loop = true; |
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break; |
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case Instruction::OpCode::CALL: |
|
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|
increment_pc = false; |
|
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|
call(state, |
|
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instr.flow_control.dest_offset, |
|
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instr.flow_control.num_instructions, |
|
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|
binary_offset + 1); |
|
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|
break; |
|
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|
|
|
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|
case Instruction::OpCode::NOP: |
|
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|
break; |
|
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|
|
|
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_dbg_assert_(HW_GPU, state.call_stack_pointer - state.call_stack < sizeof(state.call_stack)); |
|
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case Instruction::OpCode::IFU: |
|
|
|
if (shader_uniforms.b[instr.flow_control.bool_uniform_id]) { |
|
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|
call(state, |
|
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|
binary_offset + 1, |
|
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|
instr.flow_control.dest_offset - binary_offset - 1, |
|
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instr.flow_control.dest_offset + instr.flow_control.num_instructions); |
|
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|
} else { |
|
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|
call(state, |
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|
instr.flow_control.dest_offset, |
|
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|
instr.flow_control.num_instructions, |
|
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|
instr.flow_control.dest_offset + instr.flow_control.num_instructions); |
|
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} |
|
|
|
|
|
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*++state.call_stack_pointer = state.program_counter - shader_memory; |
|
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|
// TODO: Does this offset refer to the beginning of shader memory?
|
|
|
|
state.program_counter = &shader_memory[instr.flow_control.offset_words]; |
|
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|
break; |
|
|
|
|
|
|
|
case Instruction::OpCode::FLS: |
|
|
|
// TODO: Do whatever needs to be done here?
|
|
|
|
case Instruction::OpCode::IFC: |
|
|
|
{ |
|
|
|
// TODO: Do we need to consider swizzlers here?
|
|
|
|
|
|
|
|
auto flow_control = instr.flow_control; |
|
|
|
bool results[3] = { flow_control.refx == state.conditional_code[0], |
|
|
|
flow_control.refy == state.conditional_code[1] }; |
|
|
|
|
|
|
|
switch (flow_control.op) { |
|
|
|
case flow_control.Or: |
|
|
|
results[2] = results[0] || results[1]; |
|
|
|
break; |
|
|
|
|
|
|
|
case flow_control.And: |
|
|
|
results[2] = results[0] && results[1]; |
|
|
|
break; |
|
|
|
|
|
|
|
case flow_control.JustX: |
|
|
|
results[2] = results[0]; |
|
|
|
break; |
|
|
|
|
|
|
|
case flow_control.JustY: |
|
|
|
results[2] = results[1]; |
|
|
|
break; |
|
|
|
} |
|
|
|
|
|
|
|
if (results[2]) { |
|
|
|
call(state, |
|
|
|
binary_offset + 1, |
|
|
|
instr.flow_control.dest_offset - binary_offset - 1, |
|
|
|
instr.flow_control.dest_offset + instr.flow_control.num_instructions); |
|
|
|
} else { |
|
|
|
call(state, |
|
|
|
instr.flow_control.dest_offset, |
|
|
|
instr.flow_control.num_instructions, |
|
|
|
instr.flow_control.dest_offset + instr.flow_control.num_instructions); |
|
|
|
} |
|
|
|
|
|
|
|
break; |
|
|
|
} |
|
|
|
|
|
|
|
default: |
|
|
|
LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x", |
|
|
|
(int)instr.opcode.Value(), instr.GetOpCodeName().c_str(), instr.hex); |
|
|
|
(int)instr.opcode.Value(), instr.opcode.GetInfo().name, instr.hex); |
|
|
|
break; |
|
|
|
} |
|
|
|
|
|
|
|
break; |
|
|
|
} |
|
|
|
|
|
|
|
if (increment_pc) |
|
|
|
++state.program_counter; |
|
|
|
++state.program_counter; |
|
|
|
|
|
|
|
if (exit_loop) |
|
|
|
break; |
|
|
|
@ -275,13 +481,11 @@ OutputVertex RunShader(const InputVertex& input, int num_attributes) |
|
|
|
state.output_register_table[4*i+comp] = ((float24*)&ret) + semantics[comp]; |
|
|
|
} |
|
|
|
|
|
|
|
state.status_registers[0] = false; |
|
|
|
state.status_registers[1] = false; |
|
|
|
boost::fill(state.call_stack, VertexShaderState::INVALID_ADDRESS); |
|
|
|
state.call_stack_pointer = &state.call_stack[0]; |
|
|
|
state.conditional_code[0] = false; |
|
|
|
state.conditional_code[1] = false; |
|
|
|
|
|
|
|
ProcessShaderCode(state); |
|
|
|
DebugUtils::DumpShader(shader_memory, state.debug.max_offset, swizzle_data, |
|
|
|
DebugUtils::DumpShader(shader_memory.data(), state.debug.max_offset, swizzle_data.data(), |
|
|
|
state.debug.max_opdesc_id, registers.vs_main_offset, |
|
|
|
registers.vs_output_attributes); |
|
|
|
|
|
|
|
|
bunnei
11 years ago