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@ -400,7 +400,7 @@ void ArmNce::ClearInstructionCache() { |
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} |
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} |
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void ArmNce::InvalidateCacheRange(u64 addr, std::size_t size) { |
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void ArmNce::InvalidateCacheRange(u64 addr, std::size_t size) { |
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#ifdef __aarch64__
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#ifdef ARCHITECTURE_arm64
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// Invalidate instruction cache for specific range instead of full flush
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// Invalidate instruction cache for specific range instead of full flush
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constexpr u64 cache_line_size = 64; |
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constexpr u64 cache_line_size = 64; |
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const u64 aligned_addr = addr & ~(cache_line_size - 1); |
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const u64 aligned_addr = addr & ~(cache_line_size - 1); |
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