diff --git a/src/core/arm/nce/arm_nce.cpp b/src/core/arm/nce/arm_nce.cpp
index e3799a1fdc..dae3983a17 100644
--- a/src/core/arm/nce/arm_nce.cpp
+++ b/src/core/arm/nce/arm_nce.cpp
@@ -400,7 +400,7 @@ void ArmNce::ClearInstructionCache() {
 }
 
 void ArmNce::InvalidateCacheRange(u64 addr, std::size_t size) {
-#ifdef __aarch64__
+#ifdef ARCHITECTURE_arm64
     // Invalidate instruction cache for specific range instead of full flush
     constexpr u64 cache_line_size = 64;
     const u64 aligned_addr = addr & ~(cache_line_size - 1);