84a0438cf5
armemu: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAX
11 years ago
4783133bbd
ARM: Add a mechanism for faking CPU time elapsed during HLE.
- Also a few cleanups.
11 years ago
35dbfc7ab0
armemu: Implement SMMUL, SMMLA, and SMMLS.
11 years ago
82c3962b95
armemu: Implement SMLALD/SMLSLD
11 years ago
6b7808e412
armemu: Fix GE/Q flag setting semantics
11 years ago
20fc5f2a35
armemu: Set the Q flag correctly for much of the other ops
They were setting the old S flag.
11 years ago
79a7a432c5
armemu: Set the Q flag properly for SMLAD/SMUAD
11 years ago
6446331938
armemu: Properly set the Q flag for SSAT16/USAT16 upon saturation.
11 years ago
f66d356938
armemu: Fix SEL
Needs to use the updated state of the CPSR.
11 years ago
8e2accd974
armemu: Fix construction of the CPSR
11 years ago
8c72322422
armemu: Fix retrieval of the CPSR in MRS instructions.
11 years ago
97f3e884d2
dyncom: Move over QADD16/QASX/QSAX/QSUB16
11 years ago
245276c9cc
dyncom: Move SEL over
11 years ago
c6f27055c9
dyncom: Move over SASX/SSAX/SADD16/SSUB16
11 years ago
0199a7d9ef
More warning cleanups
11 years ago
ebfd831ccb
License change
11 years ago
855eda6f85
armemu: Implement SADD8/SSUB8
11 years ago
2a097f0990
armemu: Should be using labs for USAD8/USADA8
11 years ago
4b506cec01
armemu: Implement QASX and QSAX
11 years ago
0f3a6a161c
armemu: Implement SMLSD
11 years ago
4a646ace1f
dyncom: Implement UMAAL
11 years ago
00e8ec4a9e
armemu: Implement USAD8 and USADA8
11 years ago
92c53fe522
armemu: Fix SSAT16
The lower-bound would never be negative like it should
11 years ago
b9fc0b4b80
armemu: Clean up naming and formatting for SSAT16
11 years ago
e683f654ce
armemu: Fix lower-bounds clamping for USAT16
11 years ago
6b632bbe37
armemu: More concise names for USAT16-related variables
11 years ago
eaae0ad502
armemu: Get rid of bitwise parenthesis warnings
11 years ago
4dc8eb40be
armemu: Set GE flags correctly for SSUB16, SADD16, SSAX, and SASX.
11 years ago
85c318078d
armemu: Combine SSUB16, SADD16, SASX, and SSAX.
11 years ago
41fee1c940
armemu: Unset GE flags for UADD8 if results are < 0x100
Reference manual states these must be set to zero if this case is true.
11 years ago
58dc554733
armemu: Fix SSUB16
Broken from the same reason SADD16 was.
The lo part of the result should only be constructed from the lo halfwords of rm and rn.
The hi part of the result should only be constructed from the hi halfwords of rm and rn.
11 years ago
5820dba6b7
armemu: Implement UMAAL
11 years ago
2d91164bb9
armemu: Narrow the scope of some variables in handle_v6_insn
There's no reason to have these in the outer-most scope.
11 years ago
5289a496a7
armemu: Fix SADD16
The lo and hi parts of the result were being constructed as a result of hi and lo halfword intermixing from the rm and rn regs. However the lo part of the result should be constructed only from the lo halfwords of rm and rn, and the hi part of the result should only be constructed from the hi halfwords of rm and rn.
11 years ago
73211dc8fe
armemu: Fix PKHTB
11 years ago
8045df14d2
armemu: Implement REVSH
11 years ago
bc81cc9490
armemu: Fix UXTAB/UXTAH
11 years ago
b5dbd6f2a2
armemu: Fix SXTAB
11 years ago
efebd5589a
armemu: Fix SXTAH
11 years ago
9c127f4a01
armemu: Fix FTOUI NaN sign.
11 years ago
2ed03c10e0
armemu: Fix FSUBS bug where NaN shouldn't be negated
11 years ago
d5bcddb77c
armemu: Fix SMUAD, SMUSD, and SMLAD
Wrong values were being multiplied together.
11 years ago
0f9e3baf39
armemu: Join SMUAD, SMUSD, and SMLAD
11 years ago
4c53799229
armemu: Fix lower-bound signed saturation clamping for QADD16/QSUB16.
11 years ago
49817e89d9
armemu: Join QADD16 and QSUB16 together.
The only difference between these ops is one adds and one subtracts. Everything is literally the same.
11 years ago
1c7f77334c
armemu: Implement UXTAB16
11 years ago
2b0acd36e1
armemu: Fix UXTB16
Rotation bits are 10 and 11, not 9 and 10.
11 years ago
d26b7146ce
ARM: Pull some SkyEye fixes from 3dmoo.
11 years ago
f6cb8c1927
Clean up armdefs.h
11 years ago
0600e2d8b5
Convert old logging calls to new logging macros
11 years ago
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