GSP: HLE GXCommandId::SET_DISPLAY_TRANSFER and GXCommandId::SET_TEXTURE_COPY.

src/core/hle/service/gsp.cpp

@@ -176,10 +176,17 @@ void TriggerCmdReqQueue(Service::Interface* self) {
     case GXCommandId::SET_MEMORY_FILL:
         break;
 
+    // TODO: Check if texture copies are implemented correctly..
     case GXCommandId::SET_DISPLAY_TRANSFER:
-        break;
-
     case GXCommandId::SET_TEXTURE_COPY:
+        GPU::Write<u32>(GPU::Registers::DisplayInputBufferAddr, cmd_buff[1] >> 3);
+        GPU::Write<u32>(GPU::Registers::DisplayOutputBufferAddr, cmd_buff[2] >> 3);
+        GPU::Write<u32>(GPU::Registers::DisplayInputBufferSize, cmd_buff[3]);
+        GPU::Write<u32>(GPU::Registers::DisplayOutputBufferSize, cmd_buff[4]);
+        GPU::Write<u32>(GPU::Registers::DisplayTransferFlags, cmd_buff[5]);
+
+        // TODO: GPU::Registers::DisplayTriggerTransfer should be ORed with 1 for texture copies?
+        GPU::Write<u32>(GPU::Registers::DisplayTriggerTransfer, 1);
         break;
 
     case GXCommandId::SET_COMMAND_LIST_FIRST:

src/core/hw/gpu.h

@@ -22,6 +22,14 @@ struct Registers {
         FramebufferSubRight1    = 0x1EF00594,   // Sub LCD, unused first framebuffer
         FramebufferSubRight2    = 0x1EF00598,   // Sub LCD, unused second framebuffer
 
+        DisplayInputBufferAddr  = 0x1EF00C00,
+        DisplayOutputBufferAddr = 0x1EF00C04,
+        DisplayOutputBufferSize = 0x1EF00C08,
+        DisplayInputBufferSize  = 0x1EF00C0C,
+        DisplayTransferFlags    = 0x1EF00C10,
+        // Unknown??
+        DisplayTriggerTransfer  = 0x1EF00C18,
+
         CommandListSize         = 0x1EF018E0,
         CommandListAddress      = 0x1EF018E8,
         ProcessCommandList      = 0x1EF018F0,