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@ -1241,24 +1241,76 @@ void RasterizerVulkan::UpdateDepthBias(Tegra::Engines::Maxwell3D::Regs& regs) { |
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}); |
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} |
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void RasterizerVulkan::UpdateLineWidth(Tegra::Engines::Maxwell3D::Regs& regs) { |
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if (!state_tracker.TouchLineWidth()) { |
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void RasterizerVulkan::UpdateBlendConstants(Tegra::Engines::Maxwell3D::Regs& regs) { |
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if (!state_tracker.TouchBlendConstants()) { |
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return; |
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} |
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const float width = |
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regs.line_anti_alias_enable ? regs.line_width_smooth : regs.line_width_aliased; |
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scheduler.Record([width](vk::CommandBuffer cmdbuf) { cmdbuf.SetLineWidth(width); }); |
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const std::array<float, 4> blend_color{ |
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regs.blend_color.r, |
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regs.blend_color.g, |
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regs.blend_color.b, |
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regs.blend_color.a, |
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}; |
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scheduler.Record([blend_color](vk::CommandBuffer cmdbuf) { |
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cmdbuf.SetBlendConstants(blend_color.data()); |
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}); |
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} |
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if (!state_tracker.CheckStencilWriteMaskFront(regs.stencil_front_mask)) { |
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void RasterizerVulkan::UpdateDepthBounds(Tegra::Engines::Maxwell3D::Regs& regs) { |
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if (!state_tracker.TouchDepthBounds()) { |
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return; |
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} |
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if (!device.IsDepthBoundsSupported()) { |
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return; |
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} |
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const float min_depth = regs.depth_bounds[0]; |
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const float max_depth = regs.depth_bounds[1]; |
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scheduler.Record([min_depth, max_depth](vk::CommandBuffer cmdbuf) { |
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cmdbuf.SetDepthBounds(min_depth, max_depth); |
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}); |
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} |
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void RasterizerVulkan::UpdateStencilFaces(Tegra::Engines::Maxwell3D::Regs& regs) { |
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const bool properties_dirty = state_tracker.TouchStencilProperties(); |
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const bool two_sided = regs.stencil_two_side_enable != 0; |
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const bool update_side = state_tracker.TouchStencilSide(two_sided) || properties_dirty; |
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const bool update_reference = state_tracker.TouchStencilReference() || properties_dirty || update_side; |
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const bool update_write_masks = state_tracker.TouchStencilWriteMask() || properties_dirty || update_side; |
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const bool update_compare_masks = state_tracker.TouchStencilCompare() || properties_dirty || update_side; |
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if (!update_reference && !update_write_masks && !update_compare_masks) { |
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state_tracker.ClearStencilReset(); |
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return; |
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} |
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if (update_reference) { |
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const bool front_dirty = state_tracker.CheckStencilReferenceFront(regs.stencil_front_ref); |
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const bool back_dirty = two_sided ? |
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state_tracker.CheckStencilReferenceBack(regs.stencil_back_ref) : false; |
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if (update_side || front_dirty || back_dirty) { |
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scheduler.Record([front_ref = regs.stencil_front_ref, |
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back_ref = regs.stencil_back_ref, |
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two_sided](vk::CommandBuffer cmdbuf) { |
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const bool set_back = two_sided && front_ref != back_ref; |
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cmdbuf.SetStencilReference(set_back ? VK_STENCIL_FACE_FRONT_BIT |
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: VK_STENCIL_FACE_FRONT_AND_BACK, |
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front_ref); |
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if (set_back) { |
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cmdbuf.SetStencilReference(VK_STENCIL_FACE_BACK_BIT, back_ref); |
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} |
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}); |
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} |
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} |
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if (update_write_masks) { |
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const bool front_dirty = state_tracker.CheckStencilWriteMaskFront(regs.stencil_front_mask); |
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const bool back_dirty = two_sided ? |
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state_tracker.CheckStencilWriteMaskBack(regs.stencil_back_mask) : false; |
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if (update_side || front_dirty || back_dirty) { |
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scheduler.Record([front_write_mask = regs.stencil_front_mask, |
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back_write_mask = regs.stencil_back_mask, |
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two_sided = regs.stencil_two_side_enable](vk::CommandBuffer cmdbuf) { |
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two_sided](vk::CommandBuffer cmdbuf) { |
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const bool set_back = two_sided && front_write_mask != back_write_mask; |
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// Front face
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cmdbuf.SetStencilWriteMask(set_back ? VK_STENCIL_FACE_FRONT_BIT |
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: VK_STENCIL_FACE_FRONT_AND_BACK, |
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front_write_mask); |
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@ -1266,25 +1318,18 @@ void RasterizerVulkan::UpdateLineWidth(Tegra::Engines::Maxwell3D::Regs& regs) { |
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cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_BACK_BIT, back_write_mask); |
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} |
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}); |
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}(); |
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} |
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if (update_compare_masks) { |
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[&]() { |
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if (regs.stencil_two_side_enable) { |
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if (!state_tracker.CheckStencilCompareMaskFront(regs.stencil_front_func_mask) && |
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!state_tracker.CheckStencilCompareMaskBack(regs.stencil_back_func_mask)) { |
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return; |
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} |
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} else { |
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if (!state_tracker.CheckStencilCompareMaskFront(regs.stencil_front_func_mask)) { |
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return; |
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} |
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} |
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if (update_compare_masks) { |
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const bool front_dirty = state_tracker.CheckStencilCompareMaskFront(regs.stencil_front_func_mask); |
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const bool back_dirty = two_sided ? |
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state_tracker.CheckStencilCompareMaskBack(regs.stencil_back_func_mask) : false; |
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if (update_side || front_dirty || back_dirty) { |
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scheduler.Record([front_test_mask = regs.stencil_front_func_mask, |
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back_test_mask = regs.stencil_back_func_mask, |
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two_sided = regs.stencil_two_side_enable](vk::CommandBuffer cmdbuf) { |
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two_sided](vk::CommandBuffer cmdbuf) { |
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const bool set_back = two_sided && front_test_mask != back_test_mask; |
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// Front face
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cmdbuf.SetStencilCompareMask(set_back ? VK_STENCIL_FACE_FRONT_BIT |
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: VK_STENCIL_FACE_FRONT_AND_BACK, |
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front_test_mask); |
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@ -1292,8 +1337,9 @@ void RasterizerVulkan::UpdateLineWidth(Tegra::Engines::Maxwell3D::Regs& regs) { |
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cmdbuf.SetStencilCompareMask(VK_STENCIL_FACE_BACK_BIT, back_test_mask); |
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} |
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}); |
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}(); |
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} |
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} |
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state_tracker.ClearStencilReset(); |
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} |
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