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@ -7,7 +7,6 @@ |
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#include <algorithm>
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#include <cstdio>
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "common/microprofile.h"
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@ -18,6 +17,7 @@ |
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#include "core/arm/dyncom/arm_dyncom_dec.h"
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#include "core/arm/dyncom/arm_dyncom_interpreter.h"
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#include "core/arm/dyncom/arm_dyncom_thumb.h"
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#include "core/arm/dyncom/arm_dyncom_trans.h"
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#include "core/arm/dyncom/arm_dyncom_run.h"
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#include "core/arm/skyeye_common/armstate.h"
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#include "core/arm/skyeye_common/armsupp.h"
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@ -25,18 +25,6 @@ |
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#include "core/gdbstub/gdbstub.h"
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enum class TransExtData { |
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COND = (1 << 0), |
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NON_BRANCH = (1 << 1), |
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DIRECT_BRANCH = (1 << 2), |
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INDIRECT_BRANCH = (1 << 3), |
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CALL = (1 << 4), |
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RET = (1 << 5), |
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END_OF_PAGE = (1 << 6), |
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THUMB = (1 << 7), |
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SINGLE_STEP = (1 << 8) |
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}; |
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#define RM BITS(sht_oper, 0, 3)
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#define RS BITS(sht_oper, 8, 11)
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@ -47,8 +35,6 @@ enum class TransExtData { |
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#define ROTATE_RIGHT_32(n, i) ROTATE_RIGHT(n, i, 32)
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#define ROTATE_LEFT_32(n, i) ROTATE_LEFT(n, i, 32)
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typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper); |
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static bool CondPassed(const ARMul_State* cpu, unsigned int cond) { |
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const bool n_flag = cpu->NFlag != 0; |
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const bool z_flag = cpu->ZFlag != 0; |
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@ -246,12 +232,6 @@ static unsigned int DPO(RotateRightByRegister)(ARMul_State* cpu, unsigned int sh |
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return shifter_operand; |
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} |
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typedef void (*get_addr_fp_t)(ARMul_State *cpu, unsigned int inst, unsigned int &virt_addr); |
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struct ldst_inst { |
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unsigned int inst; |
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get_addr_fp_t get_addr; |
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}; |
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#define DEBUG_MSG LOG_DEBUG(Core_ARM11, "inst is %x", inst); CITRA_IGNORE_EXIT(0)
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#define LnSWoUB(s) glue(LnSWoUB, s)
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@ -669,23 +649,7 @@ static void LnSWoUB(ScaledRegisterOffset)(ARMul_State* cpu, unsigned int inst, u |
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virt_addr = addr; |
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} |
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#include "arm_dyncom_trans_struct.inc"
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typedef arm_inst * ARM_INST_PTR; |
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#define TRANS_CACHE_SIZE (64 * 1024 * 2000)
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static char trans_cache_buf[TRANS_CACHE_SIZE]; |
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static size_t trans_cache_buf_top = 0; |
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static void* AllocBuffer(size_t size) { |
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size_t start = trans_cache_buf_top; |
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trans_cache_buf_top += size; |
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ASSERT_MSG(trans_cache_buf_top <= TRANS_CACHE_SIZE, "Translation cache is full!"); |
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return static_cast<void*>(&trans_cache_buf[start]); |
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} |
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static shtop_fp_t GetShifterOp(unsigned int inst) { |
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shtop_fp_t GetShifterOp(unsigned int inst) { |
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if (BIT(inst, 25)) { |
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return DPO(Immediate); |
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} else if (BITS(inst, 4, 11) == 0) { |
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@ -710,7 +674,7 @@ static shtop_fp_t GetShifterOp(unsigned int inst) { |
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return nullptr; |
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} |
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static get_addr_fp_t GetAddressingOp(unsigned int inst) { |
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get_addr_fp_t GetAddressingOp(unsigned int inst) { |
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if (BITS(inst, 24, 27) == 5 && BIT(inst, 21) == 0) { |
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return LnSWoUB(ImmediateOffset); |
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} else if (BITS(inst, 24, 27) == 7 && BIT(inst, 21) == 0 && BITS(inst, 4, 11) == 0) { |
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@ -768,10 +732,6 @@ get_addr_fp_t GetAddressingOpLoadStoreT(unsigned int inst) { |
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return nullptr; |
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} |
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typedef ARM_INST_PTR (*transop_fp_t)(unsigned int, int); |
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#include "arm_dyncom_trans.inc"
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enum { |
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FETCH_SUCCESS, |
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FETCH_FAILURE |
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@ -782,7 +742,7 @@ static ThumbDecodeStatus DecodeThumbInstruction(u32 inst, u32 addr, u32* arm_ins |
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ThumbDecodeStatus ret = TranslateThumbInstruction (addr, inst, arm_inst, inst_size); |
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if (ret == ThumbDecodeStatus::BRANCH) { |
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int inst_index; |
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int table_length = sizeof(arm_instruction_trans) / sizeof(transop_fp_t); |
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int table_length = arm_instruction_trans_len; |
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u32 tinstr = GetThumbInstruction(inst, addr); |
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switch ((tinstr & 0xF800) >> 11) { |
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