3 changed files with 84 additions and 16 deletions
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1src/shader_recompiler/CMakeLists.txt
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83src/shader_recompiler/frontend/maxwell/translate/impl/integer_compare.cpp
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16src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell { |
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namespace { |
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enum class ComparisonOp : u64 { |
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False, |
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LessThan, |
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Equal, |
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LessThanEqual, |
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GreaterThan, |
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NotEqual, |
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GreaterThanEqual, |
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True, |
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}; |
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[[nodiscard]] IR::U1 CompareToZero(TranslatorVisitor& v, const IR::U32& operand, |
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ComparisonOp compare_op, bool is_signed) { |
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const IR::U32 zero{v.ir.Imm32(0)}; |
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switch (compare_op) { |
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case ComparisonOp::False: |
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return v.ir.Imm1(false); |
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case ComparisonOp::LessThan: |
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return v.ir.ILessThan(operand, zero, is_signed); |
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case ComparisonOp::Equal: |
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return v.ir.IEqual(operand, zero); |
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case ComparisonOp::LessThanEqual: |
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return v.ir.ILessThanEqual(operand, zero, is_signed); |
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case ComparisonOp::GreaterThan: |
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return v.ir.IGreaterThan(operand, zero, is_signed); |
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case ComparisonOp::NotEqual: |
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return v.ir.INotEqual(operand, zero); |
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case ComparisonOp::GreaterThanEqual: |
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return v.ir.IGreaterThanEqual(operand, zero, is_signed); |
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case ComparisonOp::True: |
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return v.ir.Imm1(true); |
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default: |
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throw NotImplementedException("ICMP.CMP"); |
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} |
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} |
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void ICMP(TranslatorVisitor& v, u64 insn, const IR::U32& src_a, const IR::U32& operand) { |
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union { |
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u64 insn; |
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BitField<0, 8, IR::Reg> dest_reg; |
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BitField<8, 8, IR::Reg> src_reg; |
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BitField<48, 1, u64> is_signed; |
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BitField<49, 3, ComparisonOp> compare_op; |
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} const icmp{insn}; |
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const IR::U32 zero{v.ir.Imm32(0)}; |
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const bool is_signed{icmp.is_signed != 0}; |
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const IR::U1 cmp_result{CompareToZero(v, operand, icmp.compare_op, is_signed)}; |
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const IR::U32 src_reg{v.X(icmp.src_reg)}; |
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const IR::U32 result{v.ir.Select(cmp_result, src_reg, src_a)}; |
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v.X(icmp.dest_reg, result); |
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} |
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} // Anonymous namespace
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void TranslatorVisitor::ICMP_reg(u64 insn) { |
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ICMP(*this, insn, GetReg20(insn), GetReg39(insn)); |
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} |
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void TranslatorVisitor::ICMP_rc(u64 insn) { |
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ICMP(*this, insn, GetReg39(insn), GetCbuf(insn)); |
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} |
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void TranslatorVisitor::ICMP_cr(u64 insn) { |
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ICMP(*this, insn, GetCbuf(insn), GetReg39(insn)); |
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} |
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void TranslatorVisitor::ICMP_imm(u64 insn) { |
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ICMP(*this, insn, GetImm20(insn), GetReg39(insn)); |
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} |
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} // namespace Shader::Maxwell
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