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@ -1312,6 +1312,63 @@ private: |
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} |
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} |
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} |
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} |
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/// Unpacks a video instruction operand (e.g. VMAD).
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std::string GetVideoOperand(const std::string& op, bool is_chunk, bool is_signed, |
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Tegra::Shader::VideoType type, u64 byte_height) { |
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const std::string value = [&]() { |
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if (!is_chunk) { |
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const auto offset = static_cast<u32>(byte_height * 8); |
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return "((" + op + " >> " + std::to_string(offset) + ") & 0xff)"; |
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} |
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const std::string zero = "0"; |
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switch (type) { |
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case Tegra::Shader::VideoType::Size16_Low: |
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return '(' + op + " & 0xffff)"; |
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case Tegra::Shader::VideoType::Size16_High: |
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return '(' + op + " >> 16)"; |
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case Tegra::Shader::VideoType::Size32: |
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// TODO(Rodrigo): From my hardware tests it becomes a bit "mad" when
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// this type is used (1 * 1 + 0 == 0x5b800000). Until a better
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// explanation is found: assert.
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UNIMPLEMENTED(); |
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return zero; |
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case Tegra::Shader::VideoType::Invalid: |
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UNREACHABLE_MSG("Invalid instruction encoding"); |
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return zero; |
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default: |
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UNREACHABLE(); |
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return zero; |
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} |
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}(); |
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if (is_signed) { |
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return "int(" + value + ')'; |
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} |
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return value; |
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}; |
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/// Gets the A operand for a video instruction.
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std::string GetVideoOperandA(Instruction instr) { |
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return GetVideoOperand(regs.GetRegisterAsInteger(instr.gpr8, 0, false), |
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instr.video.is_byte_chunk_a != 0, instr.video.signed_a, |
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instr.video.type_a, instr.video.byte_height_a); |
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} |
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/// Gets the B operand for a video instruction.
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std::string GetVideoOperandB(Instruction instr) { |
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if (instr.video.use_register_b) { |
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return GetVideoOperand(regs.GetRegisterAsInteger(instr.gpr20, 0, false), |
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instr.video.is_byte_chunk_b != 0, instr.video.signed_b, |
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instr.video.type_b, instr.video.byte_height_b); |
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} else { |
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return '(' + |
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std::to_string(instr.video.signed_b ? static_cast<s16>(instr.alu.GetImm20_16()) |
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: instr.alu.GetImm20_16()) + |
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')'; |
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} |
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} |
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/**
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/**
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* Compiles a single instruction from Tegra to GLSL. |
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* Compiles a single instruction from Tegra to GLSL. |
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* @param offset the offset of the Tegra shader instruction. |
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* @param offset the offset of the Tegra shader instruction. |
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@ -3321,72 +3378,12 @@ private: |
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break; |
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break; |
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} |
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} |
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case OpCode::Id::VMAD: { |
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case OpCode::Id::VMAD: { |
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const bool signed_a = instr.vmad.signed_a == 1; |
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const bool signed_b = instr.vmad.signed_b == 1; |
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const bool result_signed = signed_a || signed_b; |
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boost::optional<std::string> forced_result; |
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auto Unpack = [&](const std::string& op, bool is_chunk, bool is_signed, |
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Tegra::Shader::VmadType type, u64 byte_height) { |
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const std::string value = [&]() { |
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if (!is_chunk) { |
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const auto shift = static_cast<u32>(byte_height * 8); |
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return "((" + op + " >> " + std::to_string(shift) + ") & 0xff)"; |
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} |
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const std::string zero = "0"; |
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switch (type) { |
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case Tegra::Shader::VmadType::Size16_Low: |
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return '(' + op + " & 0xffff)"; |
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case Tegra::Shader::VmadType::Size16_High: |
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return '(' + op + " >> 16)"; |
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case Tegra::Shader::VmadType::Size32: |
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// TODO(Rodrigo): From my hardware tests it becomes a bit "mad" when
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// this type is used (1 * 1 + 0 == 0x5b800000). Until a better
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// explanation is found: assert.
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UNREACHABLE_MSG("Unimplemented"); |
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return zero; |
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case Tegra::Shader::VmadType::Invalid: |
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// Note(Rodrigo): This flag is invalid according to nvdisasm. From my
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// testing (even though it's invalid) this makes the whole instruction
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// assign zero to target register.
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forced_result = boost::make_optional(zero); |
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return zero; |
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default: |
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UNREACHABLE(); |
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return zero; |
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} |
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}(); |
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if (is_signed) { |
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return "int(" + value + ')'; |
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} |
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return value; |
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}; |
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const std::string op_a = Unpack(regs.GetRegisterAsInteger(instr.gpr8, 0, false), |
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instr.vmad.is_byte_chunk_a != 0, signed_a, |
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instr.vmad.type_a, instr.vmad.byte_height_a); |
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std::string op_b; |
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if (instr.vmad.use_register_b) { |
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op_b = Unpack(regs.GetRegisterAsInteger(instr.gpr20, 0, false), |
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instr.vmad.is_byte_chunk_b != 0, signed_b, instr.vmad.type_b, |
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instr.vmad.byte_height_b); |
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} else { |
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op_b = '(' + |
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std::to_string(signed_b ? static_cast<s16>(instr.alu.GetImm20_16()) |
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: instr.alu.GetImm20_16()) + |
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')'; |
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} |
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const bool result_signed = instr.video.signed_a == 1 || instr.video.signed_b == 1; |
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const std::string op_a = GetVideoOperandA(instr); |
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const std::string op_b = GetVideoOperandB(instr); |
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const std::string op_c = regs.GetRegisterAsInteger(instr.gpr39, 0, result_signed); |
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const std::string op_c = regs.GetRegisterAsInteger(instr.gpr39, 0, result_signed); |
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std::string result; |
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if (forced_result) { |
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result = *forced_result; |
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} else { |
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result = '(' + op_a + " * " + op_b + " + " + op_c + ')'; |
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std::string result = '(' + op_a + " * " + op_b + " + " + op_c + ')'; |
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switch (instr.vmad.shr) { |
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switch (instr.vmad.shr) { |
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case Tegra::Shader::VmadShr::Shr7: |
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case Tegra::Shader::VmadShr::Shr7: |
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@ -3396,12 +3393,36 @@ private: |
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result = '(' + result + " >> 15)"; |
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result = '(' + result + " >> 15)"; |
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break; |
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break; |
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} |
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} |
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} |
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regs.SetRegisterToInteger(instr.gpr0, result_signed, 1, result, 1, 1, |
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regs.SetRegisterToInteger(instr.gpr0, result_signed, 1, result, 1, 1, |
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instr.vmad.saturate == 1, 0, Register::Size::Word, |
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instr.vmad.saturate == 1, 0, Register::Size::Word, |
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instr.vmad.cc); |
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instr.vmad.cc); |
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break; |
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break; |
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} |
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} |
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case OpCode::Id::VSETP: { |
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const std::string op_a = GetVideoOperandA(instr); |
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const std::string op_b = GetVideoOperandB(instr); |
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// We can't use the constant predicate as destination.
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ASSERT(instr.vsetp.pred3 != static_cast<u64>(Pred::UnusedIndex)); |
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const std::string second_pred = GetPredicateCondition(instr.vsetp.pred39, false); |
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const std::string combiner = GetPredicateCombiner(instr.vsetp.op); |
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const std::string predicate = GetPredicateComparison(instr.vsetp.cond, op_a, op_b); |
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// Set the primary predicate to the result of Predicate OP SecondPredicate
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SetPredicate(instr.vsetp.pred3, |
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'(' + predicate + ") " + combiner + " (" + second_pred + ')'); |
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if (instr.vsetp.pred0 != static_cast<u64>(Pred::UnusedIndex)) { |
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// Set the secondary predicate to the result of !Predicate OP SecondPredicate,
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// if enabled
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SetPredicate(instr.vsetp.pred0, |
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"!(" + predicate + ") " + combiner + " (" + second_pred + ')'); |
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} |
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break; |
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} |
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default: { |
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default: { |
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LOG_CRITICAL(HW_GPU, "Unhandled instruction: {}", opcode->GetName()); |
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LOG_CRITICAL(HW_GPU, "Unhandled instruction: {}", opcode->GetName()); |
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UNREACHABLE(); |
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UNREACHABLE(); |
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