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@ -34,16 +34,8 @@ enum { |
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THUMB = (1 << 7) |
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THUMB = (1 << 7) |
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}; |
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}; |
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#define USER_MODE_OPT 1
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#define HYBRID_MODE 0 // Enable for JIT mode
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#define THRESHOLD 1000
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#define DURATION 500
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#define CHECK_RS if(RS == 15) rs += 8
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#define CHECK_RM if(RM == 15) rm += 8
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#undef BITS
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#undef BITS
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#undef BIT
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#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1))
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#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1))
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#define BIT(s, n) ((s >> (n)) & 1)
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#define BIT(s, n) ((s >> (n)) & 1)
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#define RM BITS(sht_oper, 0, 3)
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#define RM BITS(sht_oper, 0, 3)
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@ -702,9 +694,6 @@ void LnSWoUB(ScaledRegisterOffset)(arm_processor *cpu, unsigned int inst, unsign |
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virt_addr = addr; |
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virt_addr = addr; |
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} |
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} |
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#define ISNEG(n) (n < 0)
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#define ISPOS(n) (n >= 0)
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typedef struct _arm_inst { |
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typedef struct _arm_inst { |
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unsigned int idx; |
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unsigned int idx; |
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unsigned int cond; |
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unsigned int cond; |
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@ -1472,6 +1461,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index) |
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ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index){ |
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ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index){ |
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst)); |
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst)); |
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cdp_inst *inst_cream = (cdp_inst *)inst_base->component; |
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cdp_inst *inst_cream = (cdp_inst *)inst_base->component; |
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inst_base->cond = BITS(inst, 28, 31); |
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inst_base->cond = BITS(inst, 28, 31); |
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inst_base->idx = index; |
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inst_base->idx = index; |
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inst_base->br = NON_BRANCH; |
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inst_base->br = NON_BRANCH; |
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@ -1525,9 +1515,8 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index) |
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inst_base->load_r15 = 0; |
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inst_base->load_r15 = 0; |
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inst_cream->I = BIT(inst, 25); |
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inst_cream->I = BIT(inst, 25); |
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//inst_cream->S = BIT(inst, 20);
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inst_cream->Rn = BITS(inst, 16, 19); |
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inst_cream->Rn = BITS(inst, 16, 19); |
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//inst_cream->Rd = BITS(inst, 12, 15);
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if (CHECK_RN) |
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if (CHECK_RN) |
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inst_base->load_r15 = 1; |
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inst_base->load_r15 = 1; |
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inst_cream->shifter_operand = BITS(inst, 0, 11); |
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inst_cream->shifter_operand = BITS(inst, 0, 11); |
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@ -3533,7 +3522,6 @@ void insert_bb(unsigned int addr, int start) { |
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CreamCache[addr] = start; |
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CreamCache[addr] = start; |
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} |
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} |
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#define TRANS_THRESHOLD 65000
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int find_bb(unsigned int addr, int &start) { |
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int find_bb(unsigned int addr, int &start) { |
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int ret = -1; |
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int ret = -1; |
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bb_map::const_iterator it = CreamCache.find(addr); |
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bb_map::const_iterator it = CreamCache.find(addr); |
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