6 changed files with 134 additions and 93 deletions
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2src/video_core/CMakeLists.txt
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44src/video_core/engines/engine_upload.cpp
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74src/video_core/engines/engine_upload.h
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45src/video_core/engines/kepler_memory.cpp
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60src/video_core/engines/kepler_memory.h
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2src/video_core/gpu.cpp
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// Copyright 2019 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "video_core/engines/engine_upload.h"
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#include "video_core/memory_manager.h"
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#include "video_core/textures/decoders.h"
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namespace Tegra::Engines::Upload { |
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void State::ProcessExec(const bool is_linear) { |
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write_offset = 0; |
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copy_size = regs.line_length_in * regs.line_count; |
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inner_buffer.resize(copy_size); |
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linear = is_linear; |
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} |
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void State::ProcessData(const u32 data, const bool is_last_call) { |
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const u32 sub_copy_size = std::min(4U, copy_size - write_offset); |
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std::memcpy(&inner_buffer[write_offset], &data, sub_copy_size); |
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write_offset += sub_copy_size; |
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if (is_last_call) { |
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const GPUVAddr address{regs.dest.Address()}; |
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if (linear) { |
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memory_manager.WriteBlock(address, inner_buffer.data(), copy_size); |
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} else { |
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UNIMPLEMENTED_IF(regs.dest.z != 0); |
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UNIMPLEMENTED_IF(regs.dest.depth != 1); |
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UNIMPLEMENTED_IF(regs.dest.BlockWidth() != 1); |
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UNIMPLEMENTED_IF(regs.dest.BlockDepth() != 1); |
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const std::size_t dst_size = Tegra::Texture::CalculateSize( |
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true, 1, regs.dest.width, regs.dest.height, 1, regs.dest.BlockHeight(), 1); |
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std::vector<u8> tmp_buffer(dst_size); |
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memory_manager.ReadBlock(address, tmp_buffer.data(), dst_size); |
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Tegra::Texture::SwizzleKepler(regs.dest.width, regs.dest.height, regs.dest.x, |
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regs.dest.y, regs.dest.BlockHeight(), copy_size, |
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inner_buffer.data(), tmp_buffer.data()); |
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memory_manager.WriteBlock(address, tmp_buffer.data(), dst_size); |
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} |
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} |
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} |
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} // namespace Tegra::Engines::Upload
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// Copyright 2019 yuzu Emulator Project |
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// Licensed under GPLv2 or any later version |
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// Refer to the license.txt file included. |
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#pragma once |
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#include <cstddef> |
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#include <vector> |
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#include "common/bit_field.h" |
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#include "common/common_funcs.h" |
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#include "common/common_types.h" |
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namespace Tegra { |
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class MemoryManager; |
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} |
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namespace Tegra::Engines::Upload { |
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struct Data { |
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u32 line_length_in; |
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u32 line_count; |
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struct { |
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u32 address_high; |
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u32 address_low; |
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u32 pitch; |
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union { |
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BitField<0, 4, u32> block_width; |
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BitField<4, 4, u32> block_height; |
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BitField<8, 4, u32> block_depth; |
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}; |
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u32 width; |
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u32 height; |
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u32 depth; |
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u32 z; |
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u32 x; |
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u32 y; |
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GPUVAddr Address() const { |
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low); |
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} |
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u32 BlockWidth() const { |
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return 1U << block_width.Value(); |
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} |
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u32 BlockHeight() const { |
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return 1U << block_height.Value(); |
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} |
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u32 BlockDepth() const { |
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return 1U << block_depth.Value(); |
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} |
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} dest; |
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}; |
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class State { |
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public: |
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State(MemoryManager& memory_manager, Data& regs) : memory_manager(memory_manager), regs(regs) {} |
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~State() = default; |
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void ProcessExec(const bool is_linear); |
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void ProcessData(const u32 data, const bool is_last_call); |
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private: |
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u32 write_offset = 0; |
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u32 copy_size = 0; |
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std::vector<u8> inner_buffer; |
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bool linear; |
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Data& regs; |
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MemoryManager& memory_manager; |
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}; |
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} // namespace Tegra::Engines::Upload |
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