[dynarmic] fix qlaunch (#2967)

Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/2967
Reviewed-by: crueter <crueter@eden-emu.dev>
Reviewed-by: CamilleLaVey <camillelavey99@gmail.com>
Co-authored-by: lizzie <lizzie@eden-emu.dev>
Co-committed-by: lizzie <lizzie@eden-emu.dev>

src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_floating_point.cpp

@@ -468,9 +468,10 @@ void EmitIR<IR::Opcode::FPRoundInt32>(oaknut::CodeGenerator& code, EmitContext&
         case FP::RoundingMode::ToNearest_TieAwayFromZero:
             code.FRINTA(Sresult, Soperand);
             break;
-        }
+        default:
             UNREACHABLE();
         }
+    }
 }
 
 template<>

src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector.cpp

@@ -1668,8 +1668,9 @@ void EmitIR<IR::Opcode::VectorTableLookup64>(oaknut::CodeGenerator& code, EmitCo
             code.TBX(Dresult->B8(), oaknut::List{V0.B16(), V1.B16()}, Dindices->B8());
         }
         break;
-    }
+    default:
         UNREACHABLE();
+    }
 }
 
 template<>
@@ -1731,8 +1732,9 @@ void EmitIR<IR::Opcode::VectorTableLookup128>(oaknut::CodeGenerator& code, EmitC
             code.TBX(Qresult->B16(), oaknut::List{V0.B16(), V1.B16(), V2.B16(), V3.B16()}, Qindices->B16());
         }
         break;
-    }
+    default:
         UNREACHABLE();
+    }
 }
 
 template<>

src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp

@@ -645,9 +645,10 @@ void EmitIR<IR::Opcode::FPVectorRoundInt32>(oaknut::CodeGenerator& code, EmitCon
             case FP::RoundingMode::ToNearest_TieAwayFromZero:
                 code.FRINTA(Qresult->S4(), Qoperand->S4());
                 break;
-            }
+            default:
                 UNREACHABLE();
             }
+        }
     });
 }
 
@@ -684,9 +685,10 @@ void EmitIR<IR::Opcode::FPVectorRoundInt64>(oaknut::CodeGenerator& code, EmitCon
             case FP::RoundingMode::ToNearest_TieAwayFromZero:
                 code.FRINTA(Qresult->D2(), Qoperand->D2());
                 break;
-            }
+            default:
                 UNREACHABLE();
             }
+        }
     });
 }
 

src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.h

@@ -371,8 +371,9 @@ void RAReg<T>::Realize() {
     case RWType::ReadWrite:
         reg = T{reg_alloc.RealizeReadWriteImpl<kind>(read_value, write_value)};
         break;
-    }
+    default:
         UNREACHABLE();
+    }
 }
 
 }  // namespace Dynarmic::Backend::Arm64