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@ -51,6 +51,8 @@ |
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* =========================================================================== |
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* =========================================================================== |
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*/ |
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*/ |
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#include "common/logging/log.h"
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#include "core/arm/skyeye_common/vfp/vfp_helper.h"
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#include "core/arm/skyeye_common/vfp/vfp_helper.h"
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#include "core/arm/skyeye_common/vfp/asm_vfp.h"
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#include "core/arm/skyeye_common/vfp/asm_vfp.h"
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#include "core/arm/skyeye_common/vfp/vfp.h"
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#include "core/arm/skyeye_common/vfp/vfp.h"
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@ -63,7 +65,7 @@ static struct vfp_single vfp_single_default_qnan = { |
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static void vfp_single_dump(const char *str, struct vfp_single *s) |
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static void vfp_single_dump(const char *str, struct vfp_single *s) |
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{ |
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{ |
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pr_debug("VFP: %s: sign=%d exponent=%d significand=%08x\n", |
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LOG_DEBUG(Core_ARM11, "%s: sign=%d exponent=%d significand=%08x", |
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str, s->sign != 0, s->exponent, s->significand); |
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str, s->sign != 0, s->exponent, s->significand); |
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} |
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} |
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@ -154,7 +156,7 @@ u32 vfp_single_normaliseround(ARMul_State* state, int sd, struct vfp_single *vs, |
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} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vs->sign != 0)) |
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} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vs->sign != 0)) |
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incr = (1 << (VFP_SINGLE_LOW_BITS + 1)) - 1; |
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incr = (1 << (VFP_SINGLE_LOW_BITS + 1)) - 1; |
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pr_debug("VFP: rounding increment = 0x%08x\n", incr); |
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LOG_DEBUG(Core_ARM11, "rounding increment = 0x%08x", incr); |
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/*
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/*
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* Is our rounding going to overflow? |
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* Is our rounding going to overflow? |
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@ -209,10 +211,8 @@ pack: |
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vfp_single_dump("pack: final", vs); |
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vfp_single_dump("pack: final", vs); |
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{ |
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{ |
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s32 d = vfp_single_pack(vs); |
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s32 d = vfp_single_pack(vs); |
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#if 1
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pr_debug("VFP: %s: d(s%d)=%08x exceptions=%08x\n", func, |
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LOG_DEBUG(Core_ARM11, "%s: d(s%d)=%08x exceptions=%08x", func, |
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sd, d, exceptions); |
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sd, d, exceptions); |
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#endif
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vfp_put_float(state, d, sd); |
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vfp_put_float(state, d, sd); |
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} |
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} |
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@ -302,7 +302,7 @@ u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand) |
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u32 z, a; |
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u32 z, a; |
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if ((significand & 0xc0000000) != 0x40000000) { |
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if ((significand & 0xc0000000) != 0x40000000) { |
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pr_debug("VFP: estimate_sqrt: invalid significand\n"); |
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LOG_DEBUG(Core_ARM11, "invalid significand"); |
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} |
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} |
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a = significand << 1; |
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a = significand << 1; |
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@ -392,7 +392,7 @@ sqrt_invalid: |
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term = (u64)vsd.significand * vsd.significand; |
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term = (u64)vsd.significand * vsd.significand; |
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rem = ((u64)vsm.significand << 32) - term; |
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rem = ((u64)vsm.significand << 32) - term; |
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pr_debug("VFP: term=%016llx rem=%016llx\n", term, rem); |
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LOG_DEBUG(Core_ARM11, "term=%016lx rem=%016lx", term, rem); |
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while (rem < 0) { |
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while (rem < 0) { |
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vsd.significand -= 1; |
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vsd.significand -= 1; |
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@ -624,7 +624,7 @@ static u32 vfp_single_ftoui(ARMul_State* state, int sd, int unused, s32 m, u32 f |
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} |
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} |
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} |
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} |
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pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); |
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LOG_DEBUG(Core_ARM11, "ftoui: d(s%d)=%08x exceptions=%08x", sd, d, exceptions); |
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vfp_put_float(state, d, sd); |
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vfp_put_float(state, d, sd); |
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@ -703,7 +703,7 @@ static u32 vfp_single_ftosi(ARMul_State* state, int sd, int unused, s32 m, u32 f |
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} |
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} |
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} |
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} |
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pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); |
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LOG_DEBUG(Core_ARM11, "ftosi: d(s%d)=%08x exceptions=%08x", sd, d, exceptions); |
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vfp_put_float(state, (s32)d, sd); |
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vfp_put_float(state, (s32)d, sd); |
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@ -800,7 +800,7 @@ vfp_single_add(struct vfp_single *vsd, struct vfp_single *vsn, |
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if (vsn->significand & 0x80000000 || |
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if (vsn->significand & 0x80000000 || |
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vsm->significand & 0x80000000) { |
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vsm->significand & 0x80000000) { |
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pr_info("VFP: bad FP values in %s\n", __func__); |
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LOG_WARNING(Core_ARM11, "bad FP values"); |
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vfp_single_dump("VSN", vsn); |
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vfp_single_dump("VSN", vsn); |
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vfp_single_dump("VSM", vsm); |
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vfp_single_dump("VSM", vsm); |
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} |
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} |
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@ -871,7 +871,7 @@ vfp_single_multiply(struct vfp_single *vsd, struct vfp_single *vsn, struct vfp_s |
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struct vfp_single *t = vsn; |
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struct vfp_single *t = vsn; |
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vsn = vsm; |
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vsn = vsm; |
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vsm = t; |
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vsm = t; |
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pr_debug("VFP: swapping M <-> N\n"); |
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LOG_DEBUG(Core_ARM11, "swapping M <-> N"); |
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} |
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} |
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vsd->sign = vsn->sign ^ vsm->sign; |
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vsd->sign = vsn->sign ^ vsm->sign; |
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@ -924,7 +924,7 @@ vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s32 m, u32 fp |
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s32 v; |
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s32 v; |
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v = vfp_get_float(state, sn); |
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v = vfp_get_float(state, sn); |
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pr_debug("VFP: s%u = %08x\n", sn, v); |
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, v); |
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vfp_single_unpack(&vsn, v); |
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vfp_single_unpack(&vsn, v); |
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if (vsn.exponent == 0 && vsn.significand) |
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if (vsn.exponent == 0 && vsn.significand) |
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vfp_single_normalise_denormal(&vsn); |
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vfp_single_normalise_denormal(&vsn); |
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@ -939,7 +939,7 @@ vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s32 m, u32 fp |
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vsp.sign = vfp_sign_negate(vsp.sign); |
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vsp.sign = vfp_sign_negate(vsp.sign); |
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v = vfp_get_float(state, sd); |
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v = vfp_get_float(state, sd); |
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pr_debug("VFP: s%u = %08x\n", sd, v); |
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sd, v); |
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vfp_single_unpack(&vsn, v); |
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vfp_single_unpack(&vsn, v); |
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if (vsn.exponent == 0 && vsn.significand != 0) |
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if (vsn.exponent == 0 && vsn.significand != 0) |
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vfp_single_normalise_denormal(&vsn); |
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vfp_single_normalise_denormal(&vsn); |
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@ -961,7 +961,7 @@ vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s32 m, u32 fp |
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*/ |
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*/ |
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static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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{ |
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{ |
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pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sn, sd); |
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd); |
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, 0, "fmac"); |
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, 0, "fmac"); |
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} |
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} |
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@ -970,7 +970,8 @@ static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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*/ |
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*/ |
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static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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{ |
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{ |
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pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sd, sn); |
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// TODO: this one has its arguments inverted, investigate.
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sd, sn); |
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_MULTIPLY, "fnmac"); |
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_MULTIPLY, "fnmac"); |
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} |
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} |
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@ -979,7 +980,7 @@ static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr |
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*/ |
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*/ |
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static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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{ |
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{ |
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pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sn, sd); |
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd); |
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT, "fmsc"); |
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT, "fmsc"); |
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} |
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} |
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@ -988,7 +989,7 @@ static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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*/ |
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*/ |
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static u32 vfp_single_fnmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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static u32 vfp_single_fnmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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{ |
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{ |
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pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sn, sd); |
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd); |
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT | NEG_MULTIPLY, "fnmsc"); |
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT | NEG_MULTIPLY, "fnmsc"); |
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} |
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} |
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@ -1001,7 +1002,7 @@ static u32 vfp_single_fmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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u32 exceptions; |
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u32 exceptions; |
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s32 n = vfp_get_float(state, sn); |
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s32 n = vfp_get_float(state, sn); |
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pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sn, n); |
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n); |
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vfp_single_unpack(&vsn, n); |
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vfp_single_unpack(&vsn, n); |
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if (vsn.exponent == 0 && vsn.significand) |
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if (vsn.exponent == 0 && vsn.significand) |
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@ -1024,7 +1025,7 @@ static u32 vfp_single_fnmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr |
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u32 exceptions; |
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u32 exceptions; |
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s32 n = vfp_get_float(state, sn); |
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s32 n = vfp_get_float(state, sn); |
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pr_debug("VFP: s%u = %08x\n", sn, n); |
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n); |
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vfp_single_unpack(&vsn, n); |
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vfp_single_unpack(&vsn, n); |
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if (vsn.exponent == 0 && vsn.significand) |
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if (vsn.exponent == 0 && vsn.significand) |
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@ -1048,7 +1049,7 @@ static u32 vfp_single_fadd(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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u32 exceptions; |
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u32 exceptions; |
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s32 n = vfp_get_float(state, sn); |
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s32 n = vfp_get_float(state, sn); |
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pr_debug("VFP: s%u = %08x\n", sn, n); |
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n); |
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/*
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/*
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* Unpack and normalise denormals. |
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* Unpack and normalise denormals. |
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@ -1071,7 +1072,7 @@ static u32 vfp_single_fadd(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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*/ |
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*/ |
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static u32 vfp_single_fsub(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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static u32 vfp_single_fsub(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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{ |
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{ |
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pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sn, sd); |
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd); |
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/*
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/*
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* Subtraction is addition with one sign inverted. |
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* Subtraction is addition with one sign inverted. |
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*/ |
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*/ |
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@ -1091,7 +1092,7 @@ static u32 vfp_single_fdiv(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) |
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s32 n = vfp_get_float(state, sn); |
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s32 n = vfp_get_float(state, sn); |
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int tm, tn; |
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int tm, tn; |
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pr_debug("VFP: s%u = %08x\n", sn, n); |
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n); |
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vfp_single_unpack(&vsn, n); |
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vfp_single_unpack(&vsn, n); |
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vfp_single_unpack(&vsm, m); |
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vfp_single_unpack(&vsm, m); |
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@ -1213,7 +1214,6 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr) |
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unsigned int sm = vfp_get_sm(inst); |
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unsigned int sm = vfp_get_sm(inst); |
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unsigned int vecitr, veclen, vecstride; |
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unsigned int vecitr, veclen, vecstride; |
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struct op *fop; |
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struct op *fop; |
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pr_debug("In %s\n", __FUNCTION__); |
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vecstride = 1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK); |
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vecstride = 1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK); |
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@ -1239,11 +1239,11 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr) |
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else |
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else |
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veclen = fpscr & FPSCR_LENGTH_MASK; |
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veclen = fpscr & FPSCR_LENGTH_MASK; |
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pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, |
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LOG_DEBUG(Core_ARM11, "vecstride=%u veclen=%u", vecstride, |
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(veclen >> FPSCR_LENGTH_BIT) + 1); |
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(veclen >> FPSCR_LENGTH_BIT) + 1); |
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if (!fop->fn) { |
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if (!fop->fn) { |
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printf("VFP: could not find single op %d, inst=0x%x@0x%x\n", FEXT_TO_IDX(inst), inst, state->Reg[15]); |
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LOG_CRITICAL(Core_ARM11, "could not find single op %d, inst=0x%x@0x%x", FEXT_TO_IDX(inst), inst, state->Reg[15]); |
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exit(-1); |
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exit(-1); |
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goto invalid; |
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goto invalid; |
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} |
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} |
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@ -1255,16 +1255,16 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr) |
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type = (fop->flags & OP_DD) ? 'd' : 's'; |
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type = (fop->flags & OP_DD) ? 'd' : 's'; |
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if (op == FOP_EXT) |
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if (op == FOP_EXT) |
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pr_debug("VFP: itr%d (%c%u) = op[%u] (s%u=%08x)\n", |
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LOG_DEBUG(Core_ARM11, "itr%d (%c%u) = op[%u] (s%u=%08x)", |
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vecitr >> FPSCR_LENGTH_BIT, type, dest, sn, |
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vecitr >> FPSCR_LENGTH_BIT, type, dest, sn, |
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sm, m); |
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sm, m); |
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else |
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else |
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pr_debug("VFP: itr%d (%c%u) = (s%u) op[%u] (s%u=%08x)\n", |
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LOG_DEBUG(Core_ARM11, "itr%d (%c%u) = (s%u) op[%u] (s%u=%08x)", |
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vecitr >> FPSCR_LENGTH_BIT, type, dest, sn, |
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vecitr >> FPSCR_LENGTH_BIT, type, dest, sn, |
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FOP_TO_IDX(op), sm, m); |
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FOP_TO_IDX(op), sm, m); |
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except = fop->fn(state, dest, sn, m, fpscr); |
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except = fop->fn(state, dest, sn, m, fpscr); |
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pr_debug("VFP: itr%d: exceptions=%08x\n", |
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LOG_DEBUG(Core_ARM11, "itr%d: exceptions=%08x", |
|
|
vecitr >> FPSCR_LENGTH_BIT, except); |
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|
vecitr >> FPSCR_LENGTH_BIT, except); |
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exceptions |= except; |
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|
exceptions |= except; |
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|