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@ -73,6 +73,37 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) { |
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} |
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break; |
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} |
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case OpCode::Id::LD_C: { |
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UNIMPLEMENTED_IF(instr.ld_c.unknown != 0); |
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Node index = GetRegister(instr.gpr8); |
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const Node op_a = |
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GetConstBufferIndirect(instr.cbuf36.index, instr.cbuf36.offset + 0, index); |
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switch (instr.ld_c.type.Value()) { |
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case Tegra::Shader::UniformType::Single: |
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SetRegister(bb, instr.gpr0, op_a); |
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break; |
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case Tegra::Shader::UniformType::Double: { |
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const Node op_b = |
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GetConstBufferIndirect(instr.cbuf36.index, instr.cbuf36.offset + 4, index); |
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const Node composite = |
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Operation(OperationCode::Composite, op_a, op_b, GetRegister(RZ), GetRegister(RZ)); |
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MetaComponents meta{{0, 1, 2, 3}}; |
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bb.push_back(Operation(OperationCode::AssignComposite, meta, composite, |
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GetRegister(instr.gpr0), GetRegister(instr.gpr0.Value() + 1), |
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GetRegister(RZ), GetRegister(RZ))); |
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break; |
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} |
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default: |
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UNIMPLEMENTED_MSG("Unhandled type: {}", static_cast<unsigned>(instr.ld_c.type.Value())); |
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} |
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break; |
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} |
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case OpCode::Id::ST_A: { |
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UNIMPLEMENTED_IF_MSG(instr.gpr8.Value() != Register::ZeroIndex, |
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"Indirect attribute loads are not supported"); |
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