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351 lines
11 KiB
351 lines
11 KiB
#pragma once
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#undef NDEBUG
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#include <cstdint>
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#include <cstddef>
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#include <cassert>
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#include <ranges>
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#include <bit>
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#include <utility>
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//#ifndef __cpp_lib_unreachable
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namespace std {
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[[noreturn]] inline void unreachable() {
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#if defined(_MSC_VER) && !defined(__clang__) // MSVC
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__assume(false);
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#else // GCC, Clang
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__builtin_unreachable();
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#endif
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}
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}
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//#endif
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namespace powah {
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// Symbolic conditions
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enum class Cond : uint8_t {
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LT, LE, NG, EQ, GE, NL, GT, NE, SO, UN, NS, NU
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};
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struct GPR { uint32_t index; };
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struct FPR { uint32_t index; };
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struct CPR { uint32_t index; };
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struct Label { uint32_t index; };
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constexpr inline GPR R0{0};
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constexpr inline GPR R1{1};
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constexpr inline GPR R2{2};
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constexpr inline GPR R3{3};
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constexpr inline GPR R4{4};
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constexpr inline GPR R5{5};
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constexpr inline GPR R6{6};
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constexpr inline GPR R7{7};
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constexpr inline GPR R8{8};
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constexpr inline GPR R9{9};
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constexpr inline GPR R10{10};
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constexpr inline GPR R11{11};
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constexpr inline GPR R12{12};
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constexpr inline GPR R13{13};
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constexpr inline GPR R14{14};
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constexpr inline GPR R15{15};
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constexpr inline GPR R16{16};
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constexpr inline GPR R17{17};
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constexpr inline GPR R18{18};
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constexpr inline GPR R19{19};
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constexpr inline GPR R20{20};
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constexpr inline GPR R21{21};
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constexpr inline GPR R22{22};
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constexpr inline GPR R23{23};
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constexpr inline GPR R24{24};
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constexpr inline GPR R25{25};
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constexpr inline GPR R26{26};
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constexpr inline GPR R27{27};
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constexpr inline GPR R28{28};
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constexpr inline GPR R29{29};
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constexpr inline GPR R30{30};
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constexpr inline GPR R31{31};
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constexpr inline FPR FR0{0};
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constexpr inline FPR FR1{1};
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constexpr inline FPR FR2{2};
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constexpr inline FPR FR3{3};
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constexpr inline FPR FR4{4};
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constexpr inline FPR FR5{5};
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constexpr inline FPR FR6{6};
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constexpr inline FPR FR7{7};
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constexpr inline FPR FR8{8};
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constexpr inline FPR FR9{9};
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constexpr inline FPR FR10{10};
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constexpr inline FPR FR11{11};
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constexpr inline FPR FR12{12};
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constexpr inline FPR FR13{13};
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constexpr inline FPR FR14{14};
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constexpr inline FPR FR15{15};
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constexpr inline FPR FR16{16};
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constexpr inline FPR FR17{17};
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constexpr inline FPR FR18{18};
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constexpr inline FPR FR19{19};
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constexpr inline FPR FR20{20};
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constexpr inline FPR FR21{21};
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constexpr inline FPR FR22{22};
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constexpr inline FPR FR23{23};
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constexpr inline FPR FR24{24};
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constexpr inline FPR FR25{25};
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constexpr inline FPR FR26{26};
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constexpr inline FPR FR27{27};
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constexpr inline FPR FR28{28};
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constexpr inline FPR FR29{29};
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constexpr inline FPR FR30{30};
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constexpr inline FPR FR31{31};
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// They call it CPR because when programmers see this code they-
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constexpr inline CPR CR0{0};
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constexpr inline CPR CR1{4};
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constexpr inline CPR CR2{8};
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constexpr inline CPR CR3{12};
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constexpr inline CPR CR4{16};
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constexpr inline CPR CR5{20};
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constexpr inline CPR CR6{24};
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constexpr inline CPR CR7{28};
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struct Context {
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Context() = default;
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Context(void* ptr, size_t size)
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: base{reinterpret_cast<uint32_t*>(ptr)}
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, offset{0}
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, size{uint32_t(size)} {
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}
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~Context() = default;
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std::vector<uint32_t> labels;
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Label DefineLabel() {
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labels.push_back(0);
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return Label{ uint32_t(labels.size()) };
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}
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void LABEL(Label l) {
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assert(labels[l.index] == 0);
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labels[l.index] = offset;
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}
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static constexpr uint32_t cond2offset(Cond c) noexcept {
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switch (c) {
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case Cond::LT: return 1;
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case Cond::LE: return 2;
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case Cond::NG: return 2;
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case Cond::EQ: return 3;
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case Cond::GE: return 1;
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case Cond::NL: return 1;
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case Cond::GT: return 2;
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case Cond::NE: return 3;
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case Cond::SO: return 4;
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case Cond::UN: return 4;
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case Cond::NS: return 4;
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case Cond::NU: return 4;
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default: return 0; //hopefully icc isn't stupid
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}
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}
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uint32_t bitExt(uint32_t value, uint32_t offs, uint32_t n) {
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uint32_t mask = (1UL << (n + 1)) - 1;
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return (value & mask) << (32 - (n + offs));
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}
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void emit_XO(uint32_t op, GPR const rt, GPR const ra, GPR const rb, bool oe, bool rc) {
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(void)op;
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(void)rt;
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(void)ra;
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(void)rb;
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(void)oe;
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(void)rc;
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std::abort();
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}
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void emit_D(uint32_t op, GPR const rt, GPR const ra, uint32_t d) {
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base[offset++] = __bswap32(op |
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(op == 0x74000000
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? (bitExt(ra.index, 6, 5) | bitExt(rt.index, 11, 5))
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: (bitExt(rt.index, 6, 5) | bitExt(ra.index, 11, 5)))
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| (d & 0xffff)
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);
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}
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void emit_X(uint32_t op, GPR const ra, GPR const rt, GPR const rb, bool rc) {
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base[offset++] = __bswap32(op |
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bitExt(rt.index, 6, 5)
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| bitExt(ra.index, 11, 5)
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| bitExt(rb.index, 16, 5)
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| bitExt(rc, 31, 1)
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);
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}
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void emit_XS(uint32_t op, GPR const rt, GPR const ra, uint32_t sh, bool rc) {
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base[offset++] = __bswap32(op |
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bitExt(rt.index, 6, 5)
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| bitExt(ra.index, 11, 5)
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| bitExt(sh, 16, 5)
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| bitExt(sh >> 5, 30, 1)
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| bitExt(rc, 31, 1)
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);
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}
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void emit_reloc_I(uint32_t op, Label const& l) {
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(void)op;
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(void)l;
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std::abort();
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}
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void emit_reloc_B(uint32_t op, uint32_t cri, Label const& l, bool lk) {
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(void)op;
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(void)cri;
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(void)l;
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(void)lk;
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std::abort();
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}
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void emit_XL(uint32_t op, uint32_t bt, uint32_t ba, uint32_t bb, bool lk) {
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base[offset++] = __bswap32(op |
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bitExt(bt, 6, 5)
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| bitExt(ba, 11, 5)
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| bitExt(bb, 16, 5)
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| bitExt(lk, 31, 1)
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);
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}
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void emit_A(uint32_t op, FPR const frt, FPR const fra, FPR const frb, FPR const frc, bool rc) {
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base[offset++] = __bswap32(op |
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bitExt(frt.index, 6, 5)
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| bitExt(fra.index, 11, 5)
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| bitExt(frb.index, 16, 5)
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| bitExt(frc.index, 21, 5)
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| bitExt(rc, 31, 1)
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);
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}
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void emit_DS(uint32_t op, GPR const rt, GPR const ra, uint32_t d) {
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//assert(d & 0x03 == 0);
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base[offset++] = __bswap32(op |
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bitExt(rt.index, 6, 5)
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| bitExt(ra.index, 11, 5)
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| bitExt(d >> 2, 16, 14)
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);
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}
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void emit_M(uint32_t op, GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me, bool rc) {
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(void)op;
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(void)rs;
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(void)ra;
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(void)sh;
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(void)mb;
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(void)me;
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(void)rc;
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std::abort();
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}
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void emit_MD(uint32_t op, GPR const rs, GPR const ra, GPR const rb, uint32_t mb, bool rc) {
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assert(mb <= 0x3f);
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base[offset++] = __bswap32(op |
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bitExt(ra.index, 6, 5)
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| bitExt(rs.index, 11, 5)
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| bitExt(rb.index, 16, 5)
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| ((mb & 0x1f) << 6) | (mb & 0x20)
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| bitExt(rc, 31, 1)
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);
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}
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void emit_MD(uint32_t op, GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, bool rc) {
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assert(sh <= 0x3f && mb <= 0x3f);
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base[offset++] = __bswap32(op |
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bitExt(ra.index, 6, 5)
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| bitExt(rs.index, 11, 5)
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| ((mb & 0x1f) << 6) | (mb & 0x20)
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| ((sh & 0x1f) << 11) | ((sh >> 4) & 0x02)
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| bitExt(rc, 31, 1)
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);
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}
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void emit_MDS(uint32_t op, GPR const rs, GPR const ra, GPR const rb, uint32_t mb, bool rc) {
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base[offset++] = __bswap32(op |
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bitExt(ra.index, 6, 5)
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| bitExt(rs.index, 11, 5)
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| bitExt(rb.index, 16, 5)
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| ((mb & 0x1f) << 6) | (mb & 0x20)
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| bitExt(rc, 31, 1)
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);
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}
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void emit_XFL(uint32_t op) {
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(void)op;
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std::abort();
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}
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void emit_XFX(uint32_t op, GPR const rt, uint32_t spr) {
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(void)op;
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(void)rt;
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(void)spr;
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std::abort();
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}
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void emit_SC(uint32_t op, uint32_t lev) {
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(void)op;
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(void)lev;
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std::abort();
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}
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// Extended Memmonics, hand coded :)
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void MR(GPR const ra, GPR const rs) { OR(ra, rs, rs); }
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void NOP() { ORI(R0, R0, 0); }
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void NOT(GPR const ra, GPR const rs) { NOR(ra, rs, rs); }
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void ROTLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, n, 0); }
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void ROTRDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, 64 - n, 0); }
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void ROTLWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, n, 0, 31); }
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void ROTRWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, 32 - n, 0, 31); }
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void ROTLW(GPR const ra, GPR const rs, GPR const rb) { RLWNM(ra, rs, rb, 0, 31); }
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void ROTLD(GPR const ra, GPR const rs, GPR const rb) { RLDCL(ra, rs, rb, 0); }
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void EXTLDI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLDICR(ra, rs, b, n - 1); }
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void SLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICR(ra, rs, n, 63 - n); }
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void CLRLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, 0, n); }
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void EXTRDI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLDICL(ra, rs, b + n, 64 - n); }
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void SRDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, 64 - n, n); }
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void CLLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICR(ra, rs, 0, n); }
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void CLRSLDI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLDICR(ra, rs, n, b - n); }
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void EXTLWI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLWINM(ra, rs, b, 0, n - 1); }
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void SRWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, 32 - n, n, 31); }
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void CLRRWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, 0, 0, 31 - n); }
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void CRSET(CPR const bx) { CREQV(bx, bx, bx); }
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void CRCLR(CPR const bx) { CRXOR(bx, bx, bx); }
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void CRMOVE(CPR const bx, CPR const by) { CROR(bx, by, by); }
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void CRNOT(CPR const bx, CPR const by) { CRNOR(bx, by, by); }
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void CMPLDI(GPR const rx, uint32_t v) { CMPLI(0, 1, rx, v); }
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void CMPLWI(GPR const rx, uint32_t v) { CMPLI(0, 0, rx, v); }
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void CMPLD(GPR const rx, GPR const ry) { CMPL(0, 1, rx, ry); }
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void CMPLW(GPR const rx, GPR const ry) { CMPL(0, 0, rx, ry); }
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void CMPLDI(CPR const cr, GPR const rx, uint32_t v) { CMPLI(cr.index / 4, 1, rx, v); }
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void CMPLWI(CPR const cr, GPR const rx, uint32_t v) { CMPLI(cr.index / 4, 0, rx, v); }
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void CMPLD(CPR const cr, GPR const rx, GPR const ry) { CMPL(cr.index / 4, 1, rx, ry); }
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void CMPLW(CPR const cr, GPR const rx, GPR const ry) { CMPL(cr.index / 4, 0, rx, ry); }
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void CMPWI(CPR const cr, GPR const rx, uint32_t si) { CMPI(cr.index / 4, 0, rx, si); }
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void CMPW(CPR const cr, GPR const rx, GPR const ry) { CMP(cr.index / 4, 0, rx, ry); }
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void CMPDI(CPR const cr, GPR const rx, uint32_t si) { CMPI(cr.index / 4, 1, rx, si); }
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void CMPD(CPR const cr, GPR const rx, GPR const ry) { CMP(cr.index / 4, 1, rx, ry); }
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void BLR() { BCLR(R0, CR0, R0); }
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// TODO: PowerPC 11 stuff
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void ISEL(GPR const rd, GPR const ra, GPR const rb, uint32_t d) {
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(void)rd;
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(void)ra;
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(void)rb;
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(void)d;
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std::unreachable();
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}
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void ISELLT(GPR const rd, GPR const ra, GPR const rb) { ISEL(rd, ra, rb, 0); }
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void ISELGT(GPR const rd, GPR const ra, GPR const rb) { ISEL(rd, ra, rb, 1); }
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void ISELEQ(GPR const rd, GPR const ra, GPR const rb) { ISEL(rd, ra, rb, 2); }
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// Rawly pasted because fuck you
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#include "powah_gen_base.hpp"
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uint32_t* base = nullptr;
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uint32_t offset = 0;
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uint32_t size = 0;
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};
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}
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