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Merge pull request #2758 from ReinUsesLisp/packed-tid
shader/decode: Implement S2R Tic
pull/15/merge
bunnei
6 years ago
committed by
GitHub
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with
15 additions and
0 deletions
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src/video_core/shader/decode/other.cpp
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src/video_core/shader/shader_ir.cpp
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src/video_core/shader/shader_ir.h
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@ -74,6 +74,13 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) { |
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case SystemVariable::InvocationInfo: |
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LOG_WARNING(HW_GPU, "MOV_SYS instruction with InvocationInfo is incomplete"); |
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return Immediate(0u); |
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case SystemVariable::Tid: { |
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Node value = Immediate(0); |
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value = BitfieldInsert(value, Operation(OperationCode::LocalInvocationIdX), 0, 9); |
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value = BitfieldInsert(value, Operation(OperationCode::LocalInvocationIdY), 16, 9); |
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value = BitfieldInsert(value, Operation(OperationCode::LocalInvocationIdZ), 26, 5); |
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return value; |
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} |
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case SystemVariable::TidX: |
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return Operation(OperationCode::LocalInvocationIdX); |
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case SystemVariable::TidY: |
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@ -405,4 +405,9 @@ Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) { |
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Immediate(offset), Immediate(bits)); |
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} |
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Node ShaderIR::BitfieldInsert(Node base, Node insert, u32 offset, u32 bits) { |
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return Operation(OperationCode::UBitfieldInsert, NO_PRECISE, base, insert, Immediate(offset), |
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Immediate(bits)); |
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} |
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} // namespace VideoCommon::Shader
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@ -280,6 +280,9 @@ private: |
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/// Extracts a sequence of bits from a node |
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Node BitfieldExtract(Node value, u32 offset, u32 bits); |
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/// Inserts a sequence of bits from a node |
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Node BitfieldInsert(Node base, Node insert, u32 offset, u32 bits); |
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void WriteTexInstructionFloat(NodeBlock& bb, Tegra::Shader::Instruction instr, |
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const Node4& components); |
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