fixup

Signed-off-by: lizzie <lizzie@eden-emu.dev>

src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector.cpp

@@ -45,7 +45,7 @@ static void EmitTwoOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, IR:
         } else if constexpr (size == 64) {
             emit(Qresult->D2(), Qoperand->D2());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -68,7 +68,7 @@ static void EmitTwoOpArrangedWiden(oaknut::CodeGenerator& code, EmitContext& ctx
         } else if constexpr (size == 32) {
             emit(Qresult->D2(), Qoperand->toD().S2());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -83,7 +83,7 @@ static void EmitTwoOpArrangedNarrow(oaknut::CodeGenerator& code, EmitContext& ct
         } else if constexpr (size == 64) {
             emit(Qresult->toD().S2(), Qoperand->D2());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -106,7 +106,7 @@ static void EmitTwoOpArrangedPairWiden(oaknut::CodeGenerator& code, EmitContext&
         } else if constexpr (size == 32) {
             emit(Qresult->D2(), Qoperand->S4());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -121,7 +121,7 @@ static void EmitTwoOpArrangedLower(oaknut::CodeGenerator& code, EmitContext& ctx
         } else if constexpr (size == 32) {
             emit(Qresult->toD().S2(), Qoperand->toD().S2());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -149,7 +149,7 @@ static void EmitThreeOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, I
         } else if constexpr (size == 64) {
             emit(Qresult->D2(), Qa->D2(), Qb->D2());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -174,7 +174,7 @@ static void EmitThreeOpArrangedWiden(oaknut::CodeGenerator& code, EmitContext& c
         } else if constexpr (size == 64) {
             emit(Qresult->Q1(), Qa->toD().D1(), Qb->toD().D1());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -197,7 +197,7 @@ static void EmitThreeOpArrangedLower(oaknut::CodeGenerator& code, EmitContext& c
         } else if constexpr (size == 32) {
             emit(Qresult->toD().S2(), Qa->toD().S2(), Qb->toD().S2());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -219,7 +219,7 @@ static void EmitSaturatedAccumulate(oaknut::CodeGenerator&, EmitContext& ctx, IR
     } else if constexpr (size == 64) {
         emit(Qaccumulator->D2(), Qoperand->D2());
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 }
 
@@ -240,7 +240,7 @@ static void EmitImmShift(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* ins
     } else if constexpr (size == 64) {
         emit(Qresult->D2(), Qoperand->D2(), shift_amount);
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 }
 
@@ -268,7 +268,7 @@ static void EmitReduce(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst,
     } else if constexpr (size == 64) {
         emit(Vresult, Qoperand->D2());
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 }
 

src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp

@@ -83,7 +83,7 @@ static void EmitTwoOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, IR:
         } else if constexpr (size == 64) {
             emit(Qresult->D2(), Qa->D2());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -111,7 +111,7 @@ static void EmitThreeOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, I
         } else if constexpr (size == 64) {
             emit(Qresult->D2(), Qa->D2(), Qb->D2());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -134,7 +134,7 @@ static void EmitFMA(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* ins
         } else if constexpr (size == 64) {
             emit(Qresult->D2(), Qm->D2(), Qn->D2());
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -156,7 +156,7 @@ static void EmitFromFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Ins
         } else if constexpr (size == 64) {
             emit(Qto->D2(), Qfrom->D2(), fbits);
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     });
 }
@@ -178,7 +178,7 @@ void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst)
         } else if constexpr (fsize == 64) {
             return Qto->D2();
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     }();
     auto Vfrom = [&] {
@@ -187,7 +187,7 @@ void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst)
         } else if constexpr (fsize == 64) {
             return Qfrom->D2();
         } else {
-            static_assert(false);
+            //static_assert(false);
         }
     }();
 

src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_saturation.cpp

@@ -41,7 +41,7 @@ static void Emit(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitF
     } else if constexpr (size == 64) {
         emit(Qresult->D2(), Qa->D2(), Qb->D2());
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 }
 

src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp

@@ -300,7 +300,7 @@ int RegAlloc::GenerateImmediate(const IR::Value& value) {
 
         return 0;
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 }
 
@@ -369,7 +369,7 @@ int RegAlloc::RealizeReadImpl(const IR::Value& value) {
     } else if constexpr (required_kind == HostLoc::Kind::Flags) {
         ASSERT_FALSE("A simple read from flags is likely a logic error.");
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 }
 
@@ -394,7 +394,7 @@ int RegAlloc::RealizeWriteImpl(const IR::Inst* value) {
         flags.SetupLocation(value);
         return 0;
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 }
 
@@ -415,7 +415,7 @@ int RegAlloc::RealizeReadWriteImpl(const IR::Value& read_value, const IR::Inst*
     } else if constexpr (kind == HostLoc::Kind::Flags) {
         ASSERT_FALSE("Incorrect function for ReadWrite of flags");
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 }
 

src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp

@@ -163,7 +163,7 @@ u32 RegAlloc::GenerateImmediate(const IR::Value& value) {
     } else if constexpr (kind == HostLoc::Kind::Fpr) {
         UNIMPLEMENTED();
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 
     return 0;
@@ -226,7 +226,7 @@ u32 RegAlloc::RealizeReadImpl(const IR::Value& value) {
         fprs[new_location_index].realized = true;
         return new_location_index;
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 }
 
@@ -253,7 +253,7 @@ u32 RegAlloc::RealizeWriteImpl(const IR::Inst* value) {
         setup_location(fprs[new_location_index]);
         return new_location_index;
     } else {
-        static_assert(false);
+        //static_assert(false);
     }
 }