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@ -251,10 +251,16 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) { |
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} |
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void ARM_Dynarmic_32::ChangeProcessorID(std::size_t new_core_id) { |
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if (!jit) { |
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return; |
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} |
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jit->ChangeProcessorID(new_core_id); |
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} |
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void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) { |
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if (!jit) { |
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return; |
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} |
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Dynarmic::A32::Context context; |
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jit->SaveContext(context); |
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ctx.cpu_registers = context.Regs(); |
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@ -264,6 +270,9 @@ void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) { |
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} |
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void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) { |
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if (!jit) { |
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return; |
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} |
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Dynarmic::A32::Context context; |
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context.Regs() = ctx.cpu_registers; |
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context.ExtRegs() = ctx.extension_registers; |
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@ -273,6 +282,9 @@ void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) { |
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} |
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void ARM_Dynarmic_32::PrepareReschedule() { |
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if (!jit) { |
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return; |
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} |
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jit->HaltExecution(); |
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} |
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