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@ -15,48 +15,58 @@ |
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namespace GPU { |
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Registers g_regs; |
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RegisterSet<u32, Regs> g_regs; |
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u64 g_last_ticks = 0; ///< Last CPU ticks
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/**
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* Sets whether the framebuffers are in the GSP heap (FCRAM) or VRAM |
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* @param |
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* @param |
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*/ |
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void SetFramebufferLocation(const FramebufferLocation mode) { |
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switch (mode) { |
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case FRAMEBUFFER_LOCATION_FCRAM: |
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g_regs.framebuffer_top_left_1 = PADDR_TOP_LEFT_FRAME1; |
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g_regs.framebuffer_top_left_2 = PADDR_TOP_LEFT_FRAME2; |
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g_regs.framebuffer_top_right_1 = PADDR_TOP_RIGHT_FRAME1; |
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g_regs.framebuffer_top_right_2 = PADDR_TOP_RIGHT_FRAME2; |
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g_regs.framebuffer_sub_left_1 = PADDR_SUB_FRAME1; |
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//g_regs.framebuffer_sub_left_2 = unknown;
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g_regs.framebuffer_sub_right_1 = PADDR_SUB_FRAME2; |
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//g_regs.framebufferr_sub_right_2 = unknown;
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{ |
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auto& framebuffer_top = g_regs.Get<Regs::FramebufferTop>(); |
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auto& framebuffer_sub = g_regs.Get<Regs::FramebufferBottom>(); |
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framebuffer_top.address_left1 = PADDR_TOP_LEFT_FRAME1; |
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framebuffer_top.address_left2 = PADDR_TOP_LEFT_FRAME2; |
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framebuffer_top.address_right1 = PADDR_TOP_RIGHT_FRAME1; |
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framebuffer_top.address_right2 = PADDR_TOP_RIGHT_FRAME2; |
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framebuffer_sub.address_left1 = PADDR_SUB_FRAME1; |
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//framebuffer_sub.address_left2 = unknown;
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framebuffer_sub.address_right1 = PADDR_SUB_FRAME2; |
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//framebuffer_sub.address_right2 = unknown;
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break; |
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} |
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case FRAMEBUFFER_LOCATION_VRAM: |
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g_regs.framebuffer_top_left_1 = PADDR_VRAM_TOP_LEFT_FRAME1; |
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g_regs.framebuffer_top_left_2 = PADDR_VRAM_TOP_LEFT_FRAME2; |
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g_regs.framebuffer_top_right_1 = PADDR_VRAM_TOP_RIGHT_FRAME1; |
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g_regs.framebuffer_top_right_2 = PADDR_VRAM_TOP_RIGHT_FRAME2; |
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g_regs.framebuffer_sub_left_1 = PADDR_VRAM_SUB_FRAME1; |
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//g_regs.framebuffer_sub_left_2 = unknown;
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g_regs.framebuffer_sub_right_1 = PADDR_VRAM_SUB_FRAME2; |
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//g_regs.framebufferr_sub_right_2 = unknown;
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{ |
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auto& framebuffer_top = g_regs.Get<Regs::FramebufferTop>(); |
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auto& framebuffer_sub = g_regs.Get<Regs::FramebufferBottom>(); |
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framebuffer_top.address_left1 = PADDR_VRAM_TOP_LEFT_FRAME1; |
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framebuffer_top.address_left2 = PADDR_VRAM_TOP_LEFT_FRAME2; |
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framebuffer_top.address_right1 = PADDR_VRAM_TOP_RIGHT_FRAME1; |
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framebuffer_top.address_right2 = PADDR_VRAM_TOP_RIGHT_FRAME2; |
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framebuffer_sub.address_left1 = PADDR_VRAM_SUB_FRAME1; |
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//framebuffer_sub.address_left2 = unknown;
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framebuffer_sub.address_right1 = PADDR_VRAM_SUB_FRAME2; |
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//framebuffer_sub.address_right2 = unknown;
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break; |
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} |
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} |
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} |
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/**
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* Gets the location of the framebuffers |
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* @return Location of framebuffers as FramebufferLocation enum |
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*/ |
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const FramebufferLocation GetFramebufferLocation() { |
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if ((g_regs.framebuffer_top_right_1 & ~Memory::VRAM_MASK) == Memory::VRAM_PADDR) { |
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FramebufferLocation GetFramebufferLocation(u32 address) { |
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if ((address & ~Memory::VRAM_MASK) == Memory::VRAM_PADDR) { |
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return FRAMEBUFFER_LOCATION_VRAM; |
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} else if ((g_regs.framebuffer_top_right_1 & ~Memory::FCRAM_MASK) == Memory::FCRAM_PADDR) { |
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} else if ((address & ~Memory::FCRAM_MASK) == Memory::FCRAM_PADDR) { |
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return FRAMEBUFFER_LOCATION_FCRAM; |
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} else { |
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ERROR_LOG(GPU, "unknown framebuffer location!"); |
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@ -64,91 +74,161 @@ const FramebufferLocation GetFramebufferLocation() { |
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return FRAMEBUFFER_LOCATION_UNKNOWN; |
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} |
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u32 GetFramebufferAddr(const u32 address) { |
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switch (GetFramebufferLocation(address)) { |
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case FRAMEBUFFER_LOCATION_FCRAM: |
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return Memory::VirtualAddressFromPhysical_FCRAM(address); |
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case FRAMEBUFFER_LOCATION_VRAM: |
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return Memory::VirtualAddressFromPhysical_VRAM(address); |
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default: |
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ERROR_LOG(GPU, "unknown framebuffer location"); |
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} |
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return 0; |
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} |
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/**
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* Gets a read-only pointer to a framebuffer in memory |
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* @param address Physical address of framebuffer |
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* @return Returns const pointer to raw framebuffer |
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*/ |
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const u8* GetFramebufferPointer(const u32 address) { |
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switch (GetFramebufferLocation()) { |
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case FRAMEBUFFER_LOCATION_FCRAM: |
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return (const u8*)Memory::GetPointer(Memory::VirtualAddressFromPhysical_FCRAM(address)); |
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case FRAMEBUFFER_LOCATION_VRAM: |
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return (const u8*)Memory::GetPointer(Memory::VirtualAddressFromPhysical_VRAM(address)); |
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default: |
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ERROR_LOG(GPU, "unknown framebuffer location"); |
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} |
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return NULL; |
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u32 addr = GetFramebufferAddr(address); |
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return (addr != 0) ? Memory::GetPointer(addr) : nullptr; |
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} |
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template <typename T> |
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inline void Read(T &var, const u32 addr) { |
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switch (addr) { |
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case Registers::FramebufferTopLeft1: |
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var = g_regs.framebuffer_top_left_1; |
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break; |
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inline void Read(T &var, const u32 raw_addr) { |
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u32 addr = raw_addr - 0x1EF00000; |
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int index = addr / 4; |
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case Registers::FramebufferTopLeft2: |
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var = g_regs.framebuffer_top_left_2; |
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break; |
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// Reads other than u32 are untested, so I'd rather have them abort than silently fail
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if (index >= Regs::NumIds || !std::is_same<T,u32>::value) |
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{ |
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ERROR_LOG(GPU, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr); |
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return; |
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} |
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case Registers::FramebufferTopRight1: |
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var = g_regs.framebuffer_top_right_1; |
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break; |
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var = g_regs[static_cast<Regs::Id>(addr / 4)]; |
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} |
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case Registers::FramebufferTopRight2: |
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var = g_regs.framebuffer_top_right_2; |
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break; |
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template <typename T> |
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inline void Write(u32 addr, const T data) { |
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addr -= 0x1EF00000; |
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int index = addr / 4; |
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case Registers::FramebufferSubLeft1: |
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var = g_regs.framebuffer_sub_left_1; |
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break; |
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// Writes other than u32 are untested, so I'd rather have them abort than silently fail
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if (index >= Regs::NumIds || !std::is_same<T,u32>::value) |
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{ |
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ERROR_LOG(GPU, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr); |
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return; |
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} |
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case Registers::FramebufferSubRight1: |
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var = g_regs.framebuffer_sub_right_1; |
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break; |
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g_regs[static_cast<Regs::Id>(index)] = data; |
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case Registers::CommandListSize: |
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var = g_regs.command_list_size; |
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break; |
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switch (static_cast<Regs::Id>(index)) { |
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case Registers::CommandListAddress: |
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var = g_regs.command_list_address; |
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break; |
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// Memory fills are triggered once the fill value is written.
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// NOTE: This is not verified.
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case Regs::MemoryFill + 3: |
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case Regs::MemoryFill + 7: |
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{ |
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const auto& config = g_regs.Get<Regs::MemoryFill>(static_cast<Regs::Id>(index - 3)); |
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case Registers::ProcessCommandList: |
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var = g_regs.command_processing_enabled; |
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break; |
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// TODO: Not sure if this check should be done at GSP level instead
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if (config.address_start) { |
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// TODO: Not sure if this algorithm is correct, particularly because it doesn't use the size member at all
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u32* start = (u32*)Memory::GetPointer(config.GetStartAddress()); |
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u32* end = (u32*)Memory::GetPointer(config.GetEndAddress()); |
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for (u32* ptr = start; ptr < end; ++ptr) |
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*ptr = bswap32(config.value); // TODO: This is just a workaround to missing framebuffer format emulation
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default: |
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ERROR_LOG(GPU, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr); |
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DEBUG_LOG(GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(), config.GetEndAddress()); |
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} |
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break; |
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} |
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} |
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template <typename T> |
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inline void Write(u32 addr, const T data) { |
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switch (static_cast<Registers::Id>(addr)) { |
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case Registers::CommandListSize: |
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g_regs.command_list_size = data; |
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break; |
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case Registers::CommandListAddress: |
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g_regs.command_list_address = data; |
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case Regs::DisplayTransfer + 6: |
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{ |
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const auto& config = g_regs.Get<Regs::DisplayTransfer>(); |
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if (config.trigger & 1) { |
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u8* source_pointer = Memory::GetPointer(config.GetPhysicalInputAddress()); |
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u8* dest_pointer = Memory::GetPointer(config.GetPhysicalOutputAddress()); |
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for (int y = 0; y < config.output_height; ++y) { |
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// TODO: Why does the register seem to hold twice the framebuffer width?
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for (int x = 0; x < config.output_width / 2; ++x) { |
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struct { |
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int r, g, b, a; |
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} source_color = { 0, 0, 0, 0 }; |
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switch (config.input_format) { |
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case Regs::FramebufferFormat::RGBA8: |
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{ |
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// TODO: Most likely got the component order messed up.
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u8* srcptr = source_pointer + x * 4 + y * config.input_width * 4 / 2; |
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source_color.r = srcptr[0]; // blue
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source_color.g = srcptr[1]; // green
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source_color.b = srcptr[2]; // red
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source_color.a = srcptr[3]; // alpha
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break; |
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} |
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default: |
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ERROR_LOG(GPU, "Unknown source framebuffer format %x", config.input_format.Value()); |
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break; |
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} |
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switch (config.output_format) { |
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/*case Regs::FramebufferFormat::RGBA8:
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{ |
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// TODO: Untested
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u8* dstptr = (u32*)(dest_pointer + x * 4 + y * config.output_width * 4); |
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dstptr[0] = source_color.r; |
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dstptr[1] = source_color.g; |
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dstptr[2] = source_color.b; |
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dstptr[3] = source_color.a; |
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break; |
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}*/ |
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case Regs::FramebufferFormat::RGB8: |
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{ |
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// TODO: Most likely got the component order messed up.
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u8* dstptr = dest_pointer + x * 3 + y * config.output_width * 3 / 2; |
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dstptr[0] = source_color.r; // blue
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dstptr[1] = source_color.g; // green
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dstptr[2] = source_color.b; // red
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break; |
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} |
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default: |
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ERROR_LOG(GPU, "Unknown destination framebuffer format %x", config.output_format.Value()); |
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break; |
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} |
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} |
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} |
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DEBUG_LOG(GPU, "DisplayTriggerTransfer: 0x%08x bytes from 0x%08x(%dx%d)-> 0x%08x(%dx%d), dst format %x", |
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config.output_height * config.output_width * 4, |
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config.GetPhysicalInputAddress(), (int)config.input_width, (int)config.input_height, |
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config.GetPhysicalOutputAddress(), (int)config.output_width, (int)config.output_height, |
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config.output_format.Value()); |
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} |
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break; |
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} |
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case Registers::ProcessCommandList: |
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g_regs.command_processing_enabled = data; |
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if (g_regs.command_processing_enabled & 1) |
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case Regs::CommandProcessor + 4: |
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{ |
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const auto& config = g_regs.Get<Regs::CommandProcessor>(); |
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if (config.trigger & 1) |
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{ |
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// u32* buffer = (u32*)Memory::GetPointer(g_regs.command_list_address << 3);
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ERROR_LOG(GPU, "Beginning %x bytes of commands from address %x", g_regs.command_list_size, g_regs.command_list_address << 3); |
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// u32* buffer = (u32*)Memory::GetPointer(config.address << 3);
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ERROR_LOG(GPU, "Beginning 0x%08x bytes of commands from address 0x%08x", config.size, config.address << 3); |
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// TODO: Process command list!
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} |
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break; |
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} |
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default: |
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ERROR_LOG(GPU, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr); |
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break; |
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} |
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} |
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@ -180,7 +260,24 @@ void Update() { |
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/// Initialize hardware
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void Init() { |
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g_last_ticks = Core::g_app_core->GetTicks(); |
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SetFramebufferLocation(FRAMEBUFFER_LOCATION_FCRAM); |
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// SetFramebufferLocation(FRAMEBUFFER_LOCATION_FCRAM);
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SetFramebufferLocation(FRAMEBUFFER_LOCATION_VRAM); |
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auto& framebuffer_top = g_regs.Get<Regs::FramebufferTop>(); |
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auto& framebuffer_sub = g_regs.Get<Regs::FramebufferBottom>(); |
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// TODO: Width should be 240 instead?
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framebuffer_top.width = 480; |
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framebuffer_top.height = 400; |
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framebuffer_top.stride = 480*3; |
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framebuffer_top.color_format = Regs::FramebufferFormat::RGB8; |
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framebuffer_top.active_fb = 0; |
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framebuffer_sub.width = 480; |
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framebuffer_sub.height = 400; |
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framebuffer_sub.stride = 480*3; |
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framebuffer_sub.color_format = Regs::FramebufferFormat::RGB8; |
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framebuffer_sub.active_fb = 0; |
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NOTICE_LOG(GPU, "initialized OK"); |
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} |
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bunnei
12 years ago