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@ -3553,7 +3553,6 @@ static tdstate decode_thumb_instr(arm_processor *cpu, uint32_t inst, addr_t addr |
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case 26: |
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case 27: |
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if (((tinstr & 0x0F00) != 0x0E00) && ((tinstr & 0x0F00) != 0x0F00)){ |
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u32 cond = (tinstr & 0x0F00) >> 8; |
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inst_index = table_length - 4; |
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*ptr_inst_base = arm_instruction_trans[inst_index](tinstr, inst_index); |
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} else { |
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@ -3693,6 +3692,9 @@ static bool InAPrivilegedMode(arm_core_t *core) { |
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} |
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unsigned InterpreterMainLoop(ARMul_State* state) { |
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#undef RM
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#undef RS
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#define CRn inst_cream->crn
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#define OPCODE_2 inst_cream->opcode_2
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#define CRm inst_cream->crm
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@ -4999,7 +5001,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) { |
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} |
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uint32_t byte_mask = (BIT(inst, 16) ? 0xff : 0) | (BIT(inst, 17) ? 0xff00 : 0) |
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| (BIT(inst, 18) ? 0xff0000 : 0) | (BIT(inst, 19) ? 0xff000000 : 0); |
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uint32_t mask; |
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uint32_t mask = 0; |
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if (!inst_cream->R) { |
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if (InAPrivilegedMode(cpu)) { |
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if ((operand & StateMask) != 0) { |
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