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@ -1,26 +1,6 @@ |
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/**
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* Copyright (C) 2013 Citrus Emulator |
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* |
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* @file arm_interpreter.h |
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* @author bunnei |
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* @date 2014-04-04 |
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* @brief ARM interface instance for SkyEye interprerer |
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* |
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* @section LICENSE |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, but |
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* WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* General Public License for more details at |
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* http://www.gnu.org/copyleft/gpl.html
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* |
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* Official project repository can be found at: |
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* http://code.google.com/p/gekko-gc-emu/
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*/ |
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include "arm_interpreter.h"
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@ -29,58 +9,61 @@ const static cpu_config_t s_arm11_cpu_info = { |
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}; |
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ARM_Interpreter::ARM_Interpreter() { |
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state = new ARMul_State; |
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m_state = new ARMul_State; |
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ARMul_EmulateInit(); |
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ARMul_NewState(state); |
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ARMul_NewState(m_state); |
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state->abort_model = 0; |
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state->cpu = (cpu_config_t*)&s_arm11_cpu_info; |
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state->bigendSig = LOW; |
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m_state->abort_model = 0; |
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m_state->cpu = (cpu_config_t*)&s_arm11_cpu_info; |
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m_state->bigendSig = LOW; |
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ARMul_SelectProcessor(state, ARM_v6_Prop | ARM_v5_Prop | ARM_v5e_Prop); |
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state->lateabtSig = LOW; |
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mmu_init(state); |
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ARMul_SelectProcessor(m_state, ARM_v6_Prop | ARM_v5_Prop | ARM_v5e_Prop); |
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m_state->lateabtSig = LOW; |
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mmu_init(m_state); |
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// Reset the core to initial state
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ARMul_Reset(state); |
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state->NextInstr = 0; |
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state->Emulate = 3; |
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ARMul_Reset(m_state); |
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m_state->NextInstr = 0; |
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m_state->Emulate = 3; |
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state->pc = state->Reg[15] = 0x00000000; |
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state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack
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m_state->pc = m_state->Reg[15] = 0x00000000; |
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m_state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack
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} |
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void ARM_Interpreter::SetPC(u32 pc) { |
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state->pc = state->Reg[15] = pc; |
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m_state->pc = m_state->Reg[15] = pc; |
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} |
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u32 ARM_Interpreter::GetPC() const { |
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return m_state->pc; |
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} |
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u32 ARM_Interpreter::PC() { |
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return state->pc; |
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u32 ARM_Interpreter::GetReg(int index) const { |
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return m_state->Reg[index]; |
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} |
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u32 ARM_Interpreter::Reg(int index){ |
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return state->Reg[index]; |
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u32 ARM_Interpreter::GetCPSR() const { |
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return m_state->Cpsr; |
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} |
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u32 ARM_Interpreter::CPSR() { |
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return state->Cpsr; |
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u64 ARM_Interpreter::GetTicks() const { |
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return ARMul_Time(m_state); |
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} |
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ARM_Interpreter::~ARM_Interpreter() { |
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delete state; |
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delete m_state; |
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} |
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void ARM_Interpreter::ExecuteInstruction() { |
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state->step++; |
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state->cycle++; |
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state->EndCondition = 0; |
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state->stop_simulator = 0; |
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state->NextInstr = RESUME; |
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state->last_pc = state->Reg[15]; |
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state->Reg[15] = ARMul_DoInstr(state); |
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state->Cpsr = ((state->Cpsr & 0x0fffffdf) | (state->NFlag << 31) | (state->ZFlag << 30) | |
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(state->CFlag << 29) | (state->VFlag << 28) | (state->TFlag << 5)); |
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FLUSHPIPE; |
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m_state->step++; |
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m_state->cycle++; |
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m_state->EndCondition = 0; |
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m_state->stop_simulator = 0; |
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m_state->NextInstr = RESUME; |
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m_state->last_pc = m_state->Reg[15]; |
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m_state->Reg[15] = ARMul_DoInstr(m_state); |
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m_state->Cpsr = ((m_state->Cpsr & 0x0fffffdf) | (m_state->NFlag << 31) | (m_state->ZFlag << 30) | |
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(m_state->CFlag << 29) | (m_state->VFlag << 28) | (m_state->TFlag << 5)); |
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m_state->NextInstr |= PRIMEPIPE; // Flush pipe
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} |