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@ -3955,9 +3955,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { |
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if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { |
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add_inst* const inst_cream = (add_inst*)inst_base->component; |
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u32 rn_val = RN; |
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if (inst_cream->Rn == 15) |
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rn_val += 2 * cpu->GetInstructionSize(); |
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u32 rn_val = CHECK_READ_REG15_WA(cpu, inst_cream->Rn); |
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bool carry; |
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bool overflow; |
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@ -6167,9 +6165,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { |
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if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { |
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sub_inst* const inst_cream = (sub_inst*)inst_base->component; |
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u32 rn_val = RN; |
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if (inst_cream->Rn == 15) |
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rn_val += 2 * cpu->GetInstructionSize(); |
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u32 rn_val = CHECK_READ_REG15_WA(cpu, inst_cream->Rn); |
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bool carry; |
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bool overflow; |
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