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@ -388,7 +388,13 @@ void ArmNce::SignalInterrupt(Kernel::KThread* thread) { |
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const std::size_t CACHE_PAGE_SIZE = 4096; |
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void ArmNce::ClearInstructionCache() { |
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std::atomic_thread_fence(std::memory_order_acquire); |
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#ifdef __aarch64__
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// Ensure all previous memory operations complete
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asm volatile( |
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"\tdmb ish\n" |
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"\tdsb ish\n" |
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"\tisb\n" ::: "memory"); |
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#endif
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} |
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void ArmNce::InvalidateCacheRange(u64 addr, std::size_t size) { |
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