eden-emu
/
eden
mirror of https://git.eden-emu.dev/eden-emu/eden.git
1
0
Fork 0
Code Releases Wiki Activity
Browse Source

remove always_false 

Signed-off-by: lizzie <lizzie@eden-emu.dev>
pull/2775/head
lizzie 4 months ago
committed by crueter
parent
dd9cae4ebc
commit
ba7bd36a92
7 changed files with 31 additions and 50 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Split View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 13
      src/dynarmic/src/dynarmic/backend/arm64/abi.h
  2. 23
      src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector.cpp
  3. 13
      src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
  4. 3
      src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_saturation.cpp
  5. 9
      src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp
  6. 7
      src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp
  7. 13
      src/dynarmic/src/dynarmic/common/always_false.h

13
src/dynarmic/src/dynarmic/backend/arm64/abi.h
View File

@ -17,7 +17,6 @@
#include "dynarmic/common/assert.h"
#include <oaknut/oaknut.hpp>
#include "dynarmic/common/always_false.h"
namespace Dynarmic::Backend::Arm64 {
@ -30,25 +29,25 @@ constexpr oaknut::XReg Xpagetable{24};
constexpr oaknut::XReg Xscratch0{16}, Xscratch1{17}, Xscratch2{30};
constexpr oaknut::WReg Wscratch0{16}, Wscratch1{17}, Wscratch2{30};
template<size_t bitsize>
constexpr auto Rscratch0() {
template<size_t bitsize, typename T>
constexpr T Rscratch0() {
if constexpr (bitsize == 32) {
return Wscratch0;
} else if constexpr (bitsize == 64) {
return Xscratch0;
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<bitsize>>);
static_assert(false);
}
}
template<size_t bitsize>
constexpr auto Rscratch1() {
template<size_t bitsize, typename T>
constexpr T Rscratch1() {
if constexpr (bitsize == 32) {
return Wscratch1;
} else if constexpr (bitsize == 64) {
return Xscratch1;
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<bitsize>>);
static_assert(false);
}
}

23
src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector.cpp
View File

@ -12,7 +12,6 @@
#include "dynarmic/backend/arm64/emit_context.h"
#include "dynarmic/backend/arm64/fpsr_manager.h"
#include "dynarmic/backend/arm64/reg_alloc.h"
#include "dynarmic/common/always_false.h"
#include "dynarmic/ir/basic_block.h"
#include "dynarmic/ir/microinstruction.h"
#include "dynarmic/ir/opcodes.h"
@ -43,7 +42,7 @@ static void EmitTwoOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, IR:
} else if constexpr (size == 64) {
emit(Qresult->D2(), Qoperand->D2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -66,7 +65,7 @@ static void EmitTwoOpArrangedWiden(oaknut::CodeGenerator& code, EmitContext& ctx
} else if constexpr (size == 32) {
emit(Qresult->D2(), Qoperand->toD().S2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -81,7 +80,7 @@ static void EmitTwoOpArrangedNarrow(oaknut::CodeGenerator& code, EmitContext& ct
} else if constexpr (size == 64) {
emit(Qresult->toD().S2(), Qoperand->D2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -104,7 +103,7 @@ static void EmitTwoOpArrangedPairWiden(oaknut::CodeGenerator& code, EmitContext&
} else if constexpr (size == 32) {
emit(Qresult->D2(), Qoperand->S4());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -119,7 +118,7 @@ static void EmitTwoOpArrangedLower(oaknut::CodeGenerator& code, EmitContext& ctx
} else if constexpr (size == 32) {
emit(Qresult->toD().S2(), Qoperand->toD().S2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -147,7 +146,7 @@ static void EmitThreeOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, I
} else if constexpr (size == 64) {
emit(Qresult->D2(), Qa->D2(), Qb->D2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -172,7 +171,7 @@ static void EmitThreeOpArrangedWiden(oaknut::CodeGenerator& code, EmitContext& c
} else if constexpr (size == 64) {
emit(Qresult->Q1(), Qa->toD().D1(), Qb->toD().D1());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -195,7 +194,7 @@ static void EmitThreeOpArrangedLower(oaknut::CodeGenerator& code, EmitContext& c
} else if constexpr (size == 32) {
emit(Qresult->toD().S2(), Qa->toD().S2(), Qb->toD().S2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -217,7 +216,7 @@ static void EmitSaturatedAccumulate(oaknut::CodeGenerator&, EmitContext& ctx, IR
} else if constexpr (size == 64) {
emit(Qaccumulator->D2(), Qoperand->D2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
}
@ -238,7 +237,7 @@ static void EmitImmShift(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* ins
} else if constexpr (size == 64) {
emit(Qresult->D2(), Qoperand->D2(), shift_amount);
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
}
@ -266,7 +265,7 @@ static void EmitReduce(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst,
} else if constexpr (size == 64) {
emit(Vresult, Qoperand->D2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
}

13
src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
View File

@ -24,7 +24,6 @@
#include "dynarmic/backend/arm64/emit_context.h"
#include "dynarmic/backend/arm64/fpsr_manager.h"
#include "dynarmic/backend/arm64/reg_alloc.h"
#include "dynarmic/common/always_false.h"
#include "dynarmic/common/cast_util.h"
#include "dynarmic/common/fp/fpcr.h"
#include "dynarmic/common/fp/fpsr.h"
@ -84,7 +83,7 @@ static void EmitTwoOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, IR:
} else if constexpr (size == 64) {
emit(Qresult->D2(), Qa->D2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -112,7 +111,7 @@ static void EmitThreeOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, I
} else if constexpr (size == 64) {
emit(Qresult->D2(), Qa->D2(), Qb->D2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -135,7 +134,7 @@ static void EmitFMA(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* ins
} else if constexpr (size == 64) {
emit(Qresult->D2(), Qm->D2(), Qn->D2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -157,7 +156,7 @@ static void EmitFromFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Ins
} else if constexpr (size == 64) {
emit(Qto->D2(), Qfrom->D2(), fbits);
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
});
}
@ -179,7 +178,7 @@ void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst)
} else if constexpr (fsize == 64) {
return Qto->D2();
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<fsize>>);
static_assert(false);
}
}();
auto Vfrom = [&] {
@ -188,7 +187,7 @@ void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst)
} else if constexpr (fsize == 64) {
return Qfrom->D2();
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<fsize>>);
static_assert(false);
}
}();

3
src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_saturation.cpp
View File

@ -12,7 +12,6 @@
#include "dynarmic/backend/arm64/emit_context.h"
#include "dynarmic/backend/arm64/fpsr_manager.h"
#include "dynarmic/backend/arm64/reg_alloc.h"
#include "dynarmic/common/always_false.h"
#include "dynarmic/ir/basic_block.h"
#include "dynarmic/ir/microinstruction.h"
#include "dynarmic/ir/opcodes.h"
@ -39,7 +38,7 @@ static void Emit(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitF
} else if constexpr (size == 64) {
emit(Qresult->D2(), Qa->D2(), Qb->D2());
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<size>>);
static_assert(false);
}
}

9
src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp
View File

@ -22,7 +22,6 @@
#include "dynarmic/backend/arm64/emit_context.h"
#include "dynarmic/backend/arm64/fpsr_manager.h"
#include "dynarmic/backend/arm64/verbose_debugging_output.h"
#include "dynarmic/common/always_false.h"
namespace Dynarmic::Backend::Arm64 {
@ -301,7 +300,7 @@ int RegAlloc::GenerateImmediate(const IR::Value& value) {
return 0;
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<kind>>);
static_assert(false);
}
}
@ -370,7 +369,7 @@ int RegAlloc::RealizeReadImpl(const IR::Value& value) {
} else if constexpr (required_kind == HostLoc::Kind::Flags) {
ASSERT_FALSE("A simple read from flags is likely a logic error.");
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<required_kind>>);
static_assert(false);
}
}
@ -395,7 +394,7 @@ int RegAlloc::RealizeWriteImpl(const IR::Inst* value) {
flags.SetupLocation(value);
return 0;
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<kind>>);
static_assert(false);
}
}
@ -416,7 +415,7 @@ int RegAlloc::RealizeReadWriteImpl(const IR::Value& read_value, const IR::Inst*
} else if constexpr (kind == HostLoc::Kind::Flags) {
ASSERT_FALSE("Incorrect function for ReadWrite of flags");
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<kind>>);
static_assert(false);
}
}

7
src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp
View File

@ -15,7 +15,6 @@
#include <mcl/mp/metavalue/lift_value.hpp>
#include "dynarmic/common/common_types.h"
#include "dynarmic/common/always_false.h"
namespace Dynarmic::Backend::RV64 {
@ -164,7 +163,7 @@ u32 RegAlloc::GenerateImmediate(const IR::Value& value) {
} else if constexpr (kind == HostLoc::Kind::Fpr) {
UNIMPLEMENTED();
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<kind>>);
static_assert(false);
}
return 0;
@ -227,7 +226,7 @@ u32 RegAlloc::RealizeReadImpl(const IR::Value& value) {
fprs[new_location_index].realized = true;
return new_location_index;
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<required_kind>>);
static_assert(false);
}
}
@ -254,7 +253,7 @@ u32 RegAlloc::RealizeWriteImpl(const IR::Inst* value) {
setup_location(fprs[new_location_index]);
return new_location_index;
} else {
static_assert(Common::always_false_v<mcl::mp::lift_value<required_kind>>);
static_assert(false);
}
}

13
src/dynarmic/src/dynarmic/common/always_false.h
View File

@ -1,13 +0,0 @@
/* This file is part of the dynarmic project.
* Copyright (c) 2023 MerryMage
* SPDX-License-Identifier: 0BSD
*/
#pragma once
namespace Dynarmic::Common {
template<typename T>
inline constexpr bool always_false_v = false;
} // namespace Dynarmic::Common
Write Preview
Loading…
Cancel
Save