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@ -68,12 +68,27 @@ void SurfaceBaseImpl::SwizzleFunc(MortonSwizzleMode mode, u8* memory, const Surf |
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} |
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void SurfaceBaseImpl::LoadBuffer(Tegra::MemoryManager& memory_manager, |
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std::vector<u8>& staging_buffer) { |
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StagingCache& staging_cache) { |
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MICROPROFILE_SCOPE(GPU_Load_Texture); |
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const auto host_ptr{memory_manager.GetPointer(gpu_addr)}; |
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if (!host_ptr) { |
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return; |
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auto& staging_buffer = staging_cache.GetBuffer(0); |
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u8* host_ptr; |
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is_continuous = memory_manager.IsBlockContinuous(gpu_addr, guest_memory_size); |
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// Handle continuouty
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if (is_continuous) { |
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// Use physical memory directly
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host_ptr = memory_manager.GetPointer(gpu_addr); |
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if (!host_ptr) { |
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return; |
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} |
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} else { |
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// Use an extra temporal buffer
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auto& tmp_buffer = staging_cache.GetBuffer(1); |
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tmp_buffer.resize(guest_memory_size); |
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host_ptr = tmp_buffer.data(); |
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memory_manager.ReadBlockUnsafe(gpu_addr, host_ptr, guest_memory_size); |
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} |
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if (params.is_tiled) { |
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ASSERT_MSG(params.block_width == 0, "Block width is defined as {} on texture target {}", |
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params.block_width, static_cast<u32>(params.target)); |
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@ -123,12 +138,25 @@ void SurfaceBaseImpl::LoadBuffer(Tegra::MemoryManager& memory_manager, |
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} |
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void SurfaceBaseImpl::FlushBuffer(Tegra::MemoryManager& memory_manager, |
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std::vector<u8>& staging_buffer) { |
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StagingCache& staging_cache) { |
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MICROPROFILE_SCOPE(GPU_Flush_Texture); |
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const auto host_ptr{memory_manager.GetPointer(gpu_addr)}; |
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if (!host_ptr) { |
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return; |
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auto& staging_buffer = staging_cache.GetBuffer(0); |
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u8* host_ptr; |
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// Handle continuouty
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if (is_continuous) { |
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// Use physical memory directly
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host_ptr = memory_manager.GetPointer(gpu_addr); |
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if (!host_ptr) { |
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return; |
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} |
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} else { |
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// Use an extra temporal buffer
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auto& tmp_buffer = staging_cache.GetBuffer(1); |
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tmp_buffer.resize(guest_memory_size); |
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host_ptr = tmp_buffer.data(); |
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} |
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if (params.is_tiled) { |
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ASSERT_MSG(params.block_width == 0, "Block width is defined as {}", params.block_width); |
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for (u32 level = 0; level < params.num_levels; ++level) { |
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@ -154,6 +182,9 @@ void SurfaceBaseImpl::FlushBuffer(Tegra::MemoryManager& memory_manager, |
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} |
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} |
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} |
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if (!is_continuous) { |
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memory_manager.WriteBlockUnsafe(gpu_addr, host_ptr, guest_memory_size); |
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} |
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} |
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} // namespace VideoCommon
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