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@ -96,15 +96,14 @@ void MaxwellDMA::Launch() { |
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auto& accelerate = rasterizer->AccessAccelerateDMA(); |
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auto& accelerate = rasterizer->AccessAccelerateDMA(); |
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const bool is_const_a_dst = regs.remap_const.dst_x == RemapConst::Swizzle::CONST_A; |
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const bool is_const_a_dst = regs.remap_const.dst_x == RemapConst::Swizzle::CONST_A; |
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if (regs.launch_dma.remap_enable != 0 && is_const_a_dst) { |
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if (regs.launch_dma.remap_enable != 0 && is_const_a_dst) { |
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ASSERT(regs.remap_const.component_size_minus_one == 3); |
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accelerate.BufferClear(regs.offset_out, regs.line_length_in, |
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regs.remap_const.remap_consta_value); |
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const u32 component_size = regs.remap_const.component_size_minus_one + 1; |
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ASSERT(component_size == 1 || component_size == 2 || component_size == 4); |
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if (component_size == 4) { |
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accelerate.BufferClear(regs.offset_out, regs.line_length_in, regs.remap_const.remap_consta_value); |
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} |
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read_buffer.resize_destructive(regs.line_length_in * sizeof(u32)); |
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read_buffer.resize_destructive(regs.line_length_in * sizeof(u32)); |
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std::span<u32> span(reinterpret_cast<u32*>(read_buffer.data()), regs.line_length_in); |
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std::ranges::fill(span, regs.remap_const.remap_consta_value); |
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memory_manager.WriteBlockUnsafe(regs.offset_out, |
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reinterpret_cast<u8*>(read_buffer.data()), |
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regs.line_length_in * sizeof(u32)); |
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std::ranges::fill(std::span<u32>(reinterpret_cast<u32*>(read_buffer.data()), regs.line_length_in), regs.remap_const.remap_consta_value); |
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memory_manager.WriteBlockUnsafe(regs.offset_out, reinterpret_cast<u8*>(read_buffer.data()), static_cast<size_t>(regs.line_length_in) * component_size); |
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} else { |
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} else { |
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memory_manager.FlushCaching(); |
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memory_manager.FlushCaching(); |
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const auto convert_linear_2_blocklinear_addr = [](u64 address) { |
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const auto convert_linear_2_blocklinear_addr = [](u64 address) { |
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