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@ -321,6 +321,16 @@ OperationCode ShaderIR::GetPredicateCombiner(PredOperation operation) { |
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return op->second; |
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return op->second; |
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} |
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} |
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Node ShaderIR::GetConditionCode(Tegra::Shader::ConditionCode cc) { |
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switch (cc) { |
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case Tegra::Shader::ConditionCode::NEU: |
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return GetInternalFlag(InternalFlag::Zero, true); |
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default: |
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UNIMPLEMENTED_MSG("Unimplemented condition code: {}", static_cast<u32>(cc)); |
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return GetPredicate(static_cast<u64>(Pred::NeverExecute)); |
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} |
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} |
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void ShaderIR::SetRegister(BasicBlock& bb, Register dest, Node src) { |
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void ShaderIR::SetRegister(BasicBlock& bb, Register dest, Node src) { |
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bb.push_back(Operation(OperationCode::Assign, GetRegister(dest), src)); |
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bb.push_back(Operation(OperationCode::Assign, GetRegister(dest), src)); |
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} |
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} |
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