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@ -95,7 +95,7 @@ void ComputePipeline::Configure(Tegra::Engines::KeplerCompute& kepler_compute, |
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ASSERT(((qmd.const_buffer_enable_mask >> desc.cbuf_index) & 1) != 0); |
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const u32 index_offset{index << desc.size_shift}; |
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const u32 offset{desc.cbuf_offset + index_offset}; |
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const GPUVAddr addr{cbufs[desc.cbuf_index].Address() + desc.cbuf_offset}; |
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const GPUVAddr addr{cbufs[desc.cbuf_index].Address() + offset}; |
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if constexpr (std::is_same_v<decltype(desc), const Shader::TextureDescriptor&> || |
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std::is_same_v<decltype(desc), const Shader::TextureBufferDescriptor&>) { |
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if (desc.has_secondary) { |
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@ -136,7 +136,7 @@ void ComputePipeline::Configure(Tegra::Engines::KeplerCompute& kepler_compute, |
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ImageId* texture_buffer_ids{image_view_ids.data()}; |
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size_t index{}; |
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const auto add_buffer{[&](const auto& desc) { |
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for (u32 index = 0; index < desc.count; ++index) { |
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for (u32 i = 0; index < desc.count; ++i) { |
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bool is_written{false}; |
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if constexpr (std::is_same_v<decltype(desc), const Shader::ImageBufferDescriptor&>) { |
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is_written = desc.is_written; |
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