fixes 2

Signed-off-by: lizzie <lizzie@eden-emu.dev>

src/dynarmic/src/dynarmic/backend/arm64/abi.h

@@ -61,9 +61,7 @@ constexpr RegisterList ToRegList(oaknut::Reg reg) {
     if (reg.is_vector()) {
         return RegisterList{1} << (reg.index() + 32);
     }
-
-    ASSERT(red.index() != 31 && "ZR not allowed in reg list");
-
+    ASSERT(reg.index() != 31 && "ZR not allowed in reg list");
     if (reg.index() == -1) {
         return RegisterList{1} << 31;
     }

src/dynarmic/src/dynarmic/backend/arm64/address_space.cpp

@@ -342,9 +342,9 @@ FakeCall AddressSpace::FastmemCallback(u64 host_pc) {
     }
 
 fail:
-    fmt::print("dynarmic: Segfault happened within JITted code at host_pc = {:016x}\n", host_pc);
-    fmt::print("Segfault wasn't at a fastmem patch location!\n");
-    ASSERT(false && "segfault");
+    fmt::print("dynarmic: Segfault happened within JITted code at host_pc = {:016x}\n"
+        "Segfault wasn't at a fastmem patch location!\n", host_pc);
+    UNREACHABLE();
 }
 
 }  // namespace Dynarmic::Backend::Arm64

src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp

@@ -484,7 +484,7 @@ void RegAlloc::ReadWriteFlags(Argument& read, IR::Inst* write) {
         code.LDR(Wscratch0, SP, spill_offset + current_location->index * spill_slot_size);
         code.MSR(oaknut::SystemReg::NZCV, Xscratch0);
     } else {
-        ASSERT(false && "Invalid current location for flags");
+        UNREACHABLE(); //ASSERT(false && "Invalid current location for flags");
     }
 
     if (write) {
@@ -556,8 +556,7 @@ void RegAlloc::LoadCopyInto(const IR::Value& value, oaknut::QReg reg) {
         code.LDR(reg, SP, spill_offset + current_location->index * spill_slot_size);
         break;
     case HostLoc::Kind::Flags:
-        ASSERT(false && "Moving from flags into fprs is not currently supported");
-        break;
+        UNREACHABLE(); //ASSERT(false && "Moving from flags into fprs is not currently supported");
     }
 }
 
@@ -590,7 +589,7 @@ HostLocInfo& RegAlloc::ValueInfo(HostLoc host_loc) {
     case HostLoc::Kind::Spill:
         return spills[static_cast<size_t>(host_loc.index)];
     }
-    ASSERT(false && "RegAlloc::ValueInfo: Invalid HostLoc::Kind");
+    UNREACHABLE();
 }
 
 HostLocInfo& RegAlloc::ValueInfo(const IR::Inst* value) {
@@ -598,17 +597,14 @@ HostLocInfo& RegAlloc::ValueInfo(const IR::Inst* value) {
 
     if (const auto iter = std::find_if(gprs.begin(), gprs.end(), contains_value); iter != gprs.end()) {
         return *iter;
-    }
-    if (const auto iter = std::find_if(fprs.begin(), fprs.end(), contains_value); iter != fprs.end()) {
+    } else if (const auto iter = std::find_if(fprs.begin(), fprs.end(), contains_value); iter != fprs.end()) {
         return *iter;
-    }
-    if (contains_value(flags)) {
+    } else if (contains_value(flags)) {
         return flags;
-    }
-    if (const auto iter = std::find_if(spills.begin(), spills.end(), contains_value); iter != spills.end()) {
+    } else if (const auto iter = std::find_if(spills.begin(), spills.end(), contains_value); iter != spills.end()) {
         return *iter;
     }
-    ASSERT(false && "RegAlloc::ValueInfo: Value not found");
+    UNREACHABLE();
 }
 
 }  // namespace Dynarmic::Backend::Arm64

src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.h

@@ -182,7 +182,7 @@ public:
         } else if constexpr (size == 32) {
             return ReadW(arg);
         } else {
-            ASSERT(false && "Invalid size to ReadReg {}", size);
+            UNREACHABLE();
         }
     }
 
@@ -199,7 +199,7 @@ public:
         } else if constexpr (size == 8) {
             return ReadB(arg);
         } else {
-            ASSERT(false && "Invalid size to ReadVec {}", size);
+            UNREACHABLE();
         }
     }
 
@@ -221,7 +221,7 @@ public:
         } else if constexpr (size == 32) {
             return WriteW(inst);
         } else {
-            ASSERT(false && "Invalid size to WriteReg {}", size);
+            UNREACHABLE();
         }
     }
 
@@ -238,7 +238,7 @@ public:
         } else if constexpr (size == 8) {
             return WriteB(inst);
         } else {
-            ASSERT(false && "Invalid size to WriteVec {}", size);
+            UNREACHABLE();
         }
     }
 
@@ -258,7 +258,7 @@ public:
         } else if constexpr (size == 32) {
             return ReadWriteW(arg, inst);
         } else {
-            ASSERT(false && "Invalid size to ReadWriteReg {}", size);
+            UNREACHABLE();
         }
     }
 
@@ -275,7 +275,7 @@ public:
         } else if constexpr (size == 8) {
             return ReadWriteB(arg, inst);
         } else {
-            ASSERT(false && "Invalid size to ReadWriteVec {}", size);
+            UNREACHABLE();
         }
     }