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@ -765,12 +765,7 @@ void RasterizerVulkan::UpdateStencilOp(Tegra::Engines::Maxwell3D::Regs& regs) { |
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const Maxwell::StencilOp zpass = regs.stencil_front_op_zpass; |
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const Maxwell::ComparisonOp compare = regs.stencil_front_func_func; |
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if (regs.stencil_two_side_enable) { |
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scheduler.Record([fail, zfail, zpass, compare](vk::CommandBuffer cmdbuf) { |
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cmdbuf.SetStencilOpEXT(VK_STENCIL_FACE_FRONT_AND_BACK, MaxwellToVK::StencilOp(fail), |
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MaxwellToVK::StencilOp(zpass), MaxwellToVK::StencilOp(zfail), |
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MaxwellToVK::ComparisonOp(compare)); |
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}); |
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} else { |
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// Separate stencil op per face
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const Maxwell::StencilOp back_fail = regs.stencil_back_op_fail; |
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const Maxwell::StencilOp back_zfail = regs.stencil_back_op_zfail; |
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const Maxwell::StencilOp back_zpass = regs.stencil_back_op_zpass; |
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@ -785,6 +780,13 @@ void RasterizerVulkan::UpdateStencilOp(Tegra::Engines::Maxwell3D::Regs& regs) { |
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MaxwellToVK::StencilOp(back_zfail), |
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MaxwellToVK::ComparisonOp(back_compare)); |
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}); |
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} else { |
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// Front face defines the stencil op of both faces
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scheduler.Record([fail, zfail, zpass, compare](vk::CommandBuffer cmdbuf) { |
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cmdbuf.SetStencilOpEXT(VK_STENCIL_FACE_FRONT_AND_BACK, MaxwellToVK::StencilOp(fail), |
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MaxwellToVK::StencilOp(zpass), MaxwellToVK::StencilOp(zfail), |
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MaxwellToVK::ComparisonOp(compare)); |
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}); |
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} |
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} |
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