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@ -265,6 +265,15 @@ enum class Pred : u64 { |
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NeverExecute = 0xf, |
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}; |
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enum class SubOp : u64 { |
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Cos = 0x0, |
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Sin = 0x1, |
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Ex2 = 0x2, |
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Lg2 = 0x3, |
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Rcp = 0x4, |
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Rsq = 0x5, |
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}; |
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#pragma pack(1) |
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union Instruction { |
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Instruction& operator=(const Instruction& instr) { |
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@ -276,6 +285,7 @@ union Instruction { |
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BitField<0, 8, Register> gpr1; |
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BitField<8, 8, Register> gpr2; |
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BitField<16, 4, Pred> pred; |
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BitField<20, 7, SubOp> sub_op; |
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BitField<39, 8, Register> gpr3; |
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BitField<45, 1, u64> nb; |
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BitField<46, 1, u64> aa; |
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