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@ -17,8 +17,8 @@ u32 ShaderIR::DecodeShift(NodeBlock& bb, u32 pc) { |
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const Instruction instr = {program_code[pc]}; |
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const auto opcode = OpCode::Decode(instr); |
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const Node op_a = GetRegister(instr.gpr8); |
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const Node op_b = [&]() { |
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Node op_a = GetRegister(instr.gpr8); |
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Node op_b = [&]() { |
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if (instr.is_b_imm) { |
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return Immediate(instr.alu.GetSignedImm20_20()); |
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} else if (instr.is_b_gpr) { |
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@ -32,16 +32,23 @@ u32 ShaderIR::DecodeShift(NodeBlock& bb, u32 pc) { |
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case OpCode::Id::SHR_C: |
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case OpCode::Id::SHR_R: |
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case OpCode::Id::SHR_IMM: { |
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const Node value = SignedOperation(OperationCode::IArithmeticShiftRight, |
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instr.shift.is_signed, PRECISE, op_a, op_b); |
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if (instr.shr.wrap) { |
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op_b = Operation(OperationCode::UBitwiseAnd, std::move(op_b), Immediate(0x1f)); |
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} else { |
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op_b = Operation(OperationCode::IMax, std::move(op_b), Immediate(0)); |
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op_b = Operation(OperationCode::IMin, std::move(op_b), Immediate(31)); |
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} |
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Node value = SignedOperation(OperationCode::IArithmeticShiftRight, instr.shift.is_signed, |
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std::move(op_a), std::move(op_b)); |
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SetInternalFlagsFromInteger(bb, value, instr.generates_cc); |
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SetRegister(bb, instr.gpr0, value); |
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SetRegister(bb, instr.gpr0, std::move(value)); |
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break; |
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} |
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case OpCode::Id::SHL_C: |
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case OpCode::Id::SHL_R: |
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case OpCode::Id::SHL_IMM: { |
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const Node value = Operation(OperationCode::ILogicalShiftLeft, PRECISE, op_a, op_b); |
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const Node value = Operation(OperationCode::ILogicalShiftLeft, op_a, op_b); |
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SetInternalFlagsFromInteger(bb, value, instr.generates_cc); |
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SetRegister(bb, instr.gpr0, value); |
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break; |
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