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@ -11,6 +11,7 @@ namespace VideoCommon::Shader { |
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using Tegra::Shader::Instruction; |
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using Tegra::Shader::OpCode; |
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using Tegra::Shader::ConditionCode; |
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u32 ShaderIR::DecodeOther(BasicBlock& bb, u32 pc) { |
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const Instruction instr = {program_code[pc]}; |
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@ -45,6 +46,17 @@ u32 ShaderIR::DecodeOther(BasicBlock& bb, u32 pc) { |
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} |
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break; |
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} |
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case OpCode::Id::BRA: { |
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UNIMPLEMENTED_IF_MSG(instr.bra.constant_buffer != 0, |
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"BRA with constant buffers are not implemented"); |
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const Tegra::Shader::ConditionCode cc = instr.flow_condition_code; |
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UNIMPLEMENTED_IF(cc != Tegra::Shader::ConditionCode::T); |
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const u32 target = pc + instr.bra.GetBranchTarget(); |
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bb.push_back(Operation(OperationCode::Bra, Immediate(target))); |
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break; |
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} |
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case OpCode::Id::IPA: { |
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const auto& attribute = instr.attribute.fmt28; |
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const Tegra::Shader::IpaMode input_mode{instr.ipa.interp_mode.Value(), |
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