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replace with std::bit_cast, fix integer_of_size 

Signed-off-by: lizzie <lizzie@eden-emu.dev>
pull/2775/head
lizzie 9 months ago
committed by crueter
parent
6e7118b15b
commit
1bde15b862
26 changed files with 156 additions and 159 deletions
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  1. 20
      src/dynarmic/src/dynarmic/backend/arm64/a32_address_space.cpp
  2. 28
      src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp
  3. 6
      src/dynarmic/src/dynarmic/backend/arm64/address_space.cpp
  4. 12
      src/dynarmic/src/dynarmic/backend/arm64/devirtualize.h
  5. 8
      src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_a64.cpp
  6. 6
      src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_memory.cpp
  7. 4
      src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
  8. 4
      src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp
  9. 8
      src/dynarmic/src/dynarmic/backend/exception_handler_macos.cpp
  10. 10
      src/dynarmic/src/dynarmic/backend/exception_handler_posix.cpp
  11. 4
      src/dynarmic/src/dynarmic/backend/x64/a32_interface.cpp
  12. 4
      src/dynarmic/src/dynarmic/backend/x64/a64_interface.cpp
  13. 10
      src/dynarmic/src/dynarmic/backend/x64/devirtualize.h
  14. 24
      src/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp
  15. 37
      src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc
  16. 8
      src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.h
  17. 5
      src/dynarmic/src/dynarmic/backend/x64/emit_x64_saturation.cpp
  18. 38
      src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp
  19. 8
      src/dynarmic/src/dynarmic/backend/x64/exception_handler_windows.cpp
  20. 4
      src/dynarmic/src/dynarmic/backend/x64/perf_map.h
  21. 2
      src/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp
  22. 45
      src/dynarmic/src/dynarmic/common/assert.h
  23. 4
      src/dynarmic/src/dynarmic/common/fp/util.h
  24. 4
      src/dynarmic/src/dynarmic/common/llvm_disassemble.cpp
  25. 2
      src/dynarmic/src/dynarmic/ir/ir_emitter.cpp
  26. 10
      src/dynarmic/src/dynarmic/ir/ir_emitter.h

20
src/dynarmic/src/dynarmic/backend/arm64/a32_address_space.cpp
View File

@ -93,9 +93,9 @@ static void* EmitExclusiveReadCallTrampoline(oaknut::CodeGenerator& code, const
code.align(8);
code.l(l_this);
code.dx(mcl::bit_cast<u64>(&conf));
code.dx(std::bit_cast<u64>(&conf));
code.l(l_addr);
code.dx(mcl::bit_cast<u64>(Common::FptrCast(fn)));
code.dx(std::bit_cast<u64>(Common::FptrCast(fn)));
return target;
}
@ -151,9 +151,9 @@ static void* EmitExclusiveWriteCallTrampoline(oaknut::CodeGenerator& code, const
code.align(8);
code.l(l_this);
code.dx(mcl::bit_cast<u64>(&conf));
code.dx(std::bit_cast<u64>(&conf));
code.l(l_addr);
code.dx(mcl::bit_cast<u64>(Common::FptrCast(fn)));
code.dx(std::bit_cast<u64>(Common::FptrCast(fn)));
return target;
}
@ -219,7 +219,7 @@ void A32AddressSpace::EmitPrelude() {
code.MOV(Xstate, X1);
code.MOV(Xhalt, X2);
if (conf.page_table) {
code.MOV(Xpagetable, mcl::bit_cast<u64>(conf.page_table));
code.MOV(Xpagetable, std::bit_cast<u64>(conf.page_table));
}
if (conf.fastmem_pointer) {
code.MOV(Xfastmem, *conf.fastmem_pointer);
@ -258,7 +258,7 @@ void A32AddressSpace::EmitPrelude() {
code.MOV(Xstate, X1);
code.MOV(Xhalt, X2);
if (conf.page_table) {
code.MOV(Xpagetable, mcl::bit_cast<u64>(conf.page_table));
code.MOV(Xpagetable, std::bit_cast<u64>(conf.page_table));
}
if (conf.fastmem_pointer) {
code.MOV(Xfastmem, *conf.fastmem_pointer);
@ -317,9 +317,9 @@ void A32AddressSpace::EmitPrelude() {
code.align(8);
code.l(l_this);
code.dx(mcl::bit_cast<u64>(this));
code.dx(std::bit_cast<u64>(this));
code.l(l_addr);
code.dx(mcl::bit_cast<u64>(Common::FptrCast(fn)));
code.dx(std::bit_cast<u64>(Common::FptrCast(fn)));
}
prelude_info.return_from_run_code = code.xptr<void*>();
@ -347,7 +347,7 @@ void A32AddressSpace::EmitPrelude() {
code.align(8);
code.l(l_return_to_dispatcher);
code.dx(mcl::bit_cast<u64>(prelude_info.return_to_dispatcher));
code.dx(std::bit_cast<u64>(prelude_info.return_to_dispatcher));
prelude_info.end_of_prelude = code.offset();
@ -369,7 +369,7 @@ EmitConfig A32AddressSpace::GetEmitConfig() {
.check_halt_on_memory_access = conf.check_halt_on_memory_access,
.page_table_pointer = mcl::bit_cast<u64>(conf.page_table),
.page_table_pointer = std::bit_cast<u64>(conf.page_table),
.page_table_address_space_bits = 32,
.page_table_pointer_mask_bits = conf.page_table_pointer_mask_bits,
.silently_mirror_page_table = true,

28
src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp
View File

@ -92,9 +92,9 @@ static void* EmitExclusiveReadCallTrampoline(oaknut::CodeGenerator& code, const
code.align(8);
code.l(l_this);
code.dx(mcl::bit_cast<u64>(&conf));
code.dx(std::bit_cast<u64>(&conf));
code.l(l_addr);
code.dx(mcl::bit_cast<u64>(Common::FptrCast(fn)));
code.dx(std::bit_cast<u64>(Common::FptrCast(fn)));
return target;
}
@ -150,9 +150,9 @@ static void* EmitExclusiveWriteCallTrampoline(oaknut::CodeGenerator& code, const
code.align(8);
code.l(l_this);
code.dx(mcl::bit_cast<u64>(&conf));
code.dx(std::bit_cast<u64>(&conf));
code.l(l_addr);
code.dx(mcl::bit_cast<u64>(Common::FptrCast(fn)));
code.dx(std::bit_cast<u64>(Common::FptrCast(fn)));
return target;
}
@ -235,9 +235,9 @@ static void* EmitExclusiveRead128CallTrampoline(oaknut::CodeGenerator& code, con
code.align(8);
code.l(l_this);
code.dx(mcl::bit_cast<u64>(&conf));
code.dx(std::bit_cast<u64>(&conf));
code.l(l_addr);
code.dx(mcl::bit_cast<u64>(Common::FptrCast(fn)));
code.dx(std::bit_cast<u64>(Common::FptrCast(fn)));
return target;
}
@ -317,9 +317,9 @@ static void* EmitExclusiveWrite128CallTrampoline(oaknut::CodeGenerator& code, co
code.align(8);
code.l(l_this);
code.dx(mcl::bit_cast<u64>(&conf));
code.dx(std::bit_cast<u64>(&conf));
code.l(l_addr);
code.dx(mcl::bit_cast<u64>(Common::FptrCast(fn)));
code.dx(std::bit_cast<u64>(Common::FptrCast(fn)));
return target;
}
@ -396,7 +396,7 @@ void A64AddressSpace::EmitPrelude() {
code.MOV(Xstate, X1);
code.MOV(Xhalt, X2);
if (conf.page_table) {
code.MOV(Xpagetable, mcl::bit_cast<u64>(conf.page_table));
code.MOV(Xpagetable, std::bit_cast<u64>(conf.page_table));
}
if (conf.fastmem_pointer) {
code.MOV(Xfastmem, *conf.fastmem_pointer);
@ -434,7 +434,7 @@ void A64AddressSpace::EmitPrelude() {
code.MOV(Xstate, X1);
code.MOV(Xhalt, X2);
if (conf.page_table) {
code.MOV(Xpagetable, mcl::bit_cast<u64>(conf.page_table));
code.MOV(Xpagetable, std::bit_cast<u64>(conf.page_table));
}
if (conf.fastmem_pointer) {
code.MOV(Xfastmem, *conf.fastmem_pointer);
@ -492,9 +492,9 @@ void A64AddressSpace::EmitPrelude() {
code.align(8);
code.l(l_this);
code.dx(mcl::bit_cast<u64>(this));
code.dx(std::bit_cast<u64>(this));
code.l(l_addr);
code.dx(mcl::bit_cast<u64>(Common::FptrCast(fn)));
code.dx(std::bit_cast<u64>(Common::FptrCast(fn)));
}
prelude_info.return_from_run_code = code.xptr<void*>();
@ -522,7 +522,7 @@ void A64AddressSpace::EmitPrelude() {
code.align(8);
code.l(l_return_to_dispatcher);
code.dx(mcl::bit_cast<u64>(prelude_info.return_to_dispatcher));
code.dx(std::bit_cast<u64>(prelude_info.return_to_dispatcher));
prelude_info.end_of_prelude = code.offset();
@ -544,7 +544,7 @@ EmitConfig A64AddressSpace::GetEmitConfig() {
.check_halt_on_memory_access = conf.check_halt_on_memory_access,
.page_table_pointer = mcl::bit_cast<u64>(conf.page_table),
.page_table_pointer = std::bit_cast<u64>(conf.page_table),
.page_table_address_space_bits = conf.page_table_address_space_bits,
.page_table_pointer_mask_bits = conf.page_table_pointer_mask_bits,
.silently_mirror_page_table = conf.silently_mirror_page_table,

6
src/dynarmic/src/dynarmic/backend/arm64/address_space.cpp
View File

@ -5,7 +5,7 @@
#include <cstdio>
#include <mcl/bit_cast.hpp>
#include <numeric>
#include "dynarmic/backend/arm64/a64_address_space.h"
#include "dynarmic/backend/arm64/a64_jitstate.h"
@ -99,7 +99,7 @@ void AddressSpace::ClearCache() {
void AddressSpace::DumpDisassembly() const {
for (u32* ptr = mem.ptr(); ptr < code.xptr<u32*>(); ptr++) {
std::printf("%s", Common::DisassembleAArch64(*ptr, mcl::bit_cast<u64>(ptr)).c_str());
std::printf("%s", Common::DisassembleAArch64(*ptr, std::bit_cast<u64>(ptr)).c_str());
}
}
@ -316,7 +316,7 @@ void AddressSpace::RelinkForDescriptor(IR::LocationDescriptor target_descriptor,
FakeCall AddressSpace::FastmemCallback(u64 host_pc) {
{
const auto host_ptr = mcl::bit_cast<CodePtr>(host_pc);
const auto host_ptr = std::bit_cast<CodePtr>(host_pc);
const auto entry_point = ReverseGetEntryPoint(host_ptr);
if (!entry_point) {

12
src/dynarmic/src/dynarmic/backend/arm64/devirtualize.h
View File

@ -8,7 +8,7 @@
#pragma once
#include <mcl/bit_cast.hpp>
#include <numeric>
#include "dynarmic/common/common_types.h"
#include <mcl/type_traits/function_info.hpp>
@ -23,7 +23,7 @@ struct DevirtualizedCall {
template<auto mfp>
DevirtualizedCall DevirtualizeWindows(mcl::class_type<decltype(mfp)>* this_) {
static_assert(sizeof(mfp) == 8);
return DevirtualizedCall{mcl::bit_cast<u64>(mfp), reinterpret_cast<u64>(this_)};
return DevirtualizedCall{std::bit_cast<u64>(mfp), reinterpret_cast<u64>(this_)};
}
// https://github.com/ARM-software/abi-aa/blob/main/cppabi64/cppabi64.rst#representation-of-pointer-to-member-function
@ -34,16 +34,16 @@ DevirtualizedCall DevirtualizeDefault(mcl::class_type<decltype(mfp)>* this_) {
u64 ptr;
// LSB is discriminator for if function is virtual. Other bits are this adjustment.
u64 adj;
} mfp_struct = mcl::bit_cast<MemberFunctionPointer>(mfp);
} mfp_struct = std::bit_cast<MemberFunctionPointer>(mfp);
static_assert(sizeof(MemberFunctionPointer) == 16);
static_assert(sizeof(MemberFunctionPointer) == sizeof(mfp));
u64 fn_ptr = mfp_struct.ptr;
u64 this_ptr = mcl::bit_cast<u64>(this_) + (mfp_struct.adj >> 1);
u64 this_ptr = std::bit_cast<u64>(this_) + (mfp_struct.adj >> 1);
if (mfp_struct.adj & 1) {
u64 vtable = mcl::bit_cast_pointee<u64>(this_ptr);
fn_ptr = mcl::bit_cast_pointee<u64>(vtable + fn_ptr);
u64 vtable = std::bit_cast<u64>(this_ptr);
fn_ptr = std::bit_cast<u64>(vtable + fn_ptr);
}
return DevirtualizedCall{fn_ptr, this_ptr};
}

8
src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_a64.cpp
View File

@ -3,7 +3,7 @@
* SPDX-License-Identifier: 0BSD
*/
#include <mcl/bit_cast.hpp>
#include <numeric>
#include <oaknut/oaknut.hpp>
#include "dynarmic/backend/arm64/a64_jitstate.h"
@ -495,7 +495,7 @@ template<>
void EmitIR<IR::Opcode::A64GetTPIDR>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
auto Xvalue = ctx.reg_alloc.WriteX(inst);
RegAlloc::Realize(Xvalue);
code.MOV(Xscratch0, mcl::bit_cast<u64>(ctx.conf.tpidr_el0));
code.MOV(Xscratch0, std::bit_cast<u64>(ctx.conf.tpidr_el0));
code.LDR(Xvalue, Xscratch0);
}
@ -503,7 +503,7 @@ template<>
void EmitIR<IR::Opcode::A64GetTPIDRRO>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
auto Xvalue = ctx.reg_alloc.WriteX(inst);
RegAlloc::Realize(Xvalue);
code.MOV(Xscratch0, mcl::bit_cast<u64>(ctx.conf.tpidrro_el0));
code.MOV(Xscratch0, std::bit_cast<u64>(ctx.conf.tpidrro_el0));
code.LDR(Xvalue, Xscratch0);
}
@ -512,7 +512,7 @@ void EmitIR<IR::Opcode::A64SetTPIDR>(oaknut::CodeGenerator& code, EmitContext& c
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
auto Xvalue = ctx.reg_alloc.ReadX(args[0]);
RegAlloc::Realize(Xvalue);
code.MOV(Xscratch0, mcl::bit_cast<u64>(ctx.conf.tpidr_el0));
code.MOV(Xscratch0, std::bit_cast<u64>(ctx.conf.tpidr_el0));
code.STR(Xvalue, Xscratch0);
}

6
src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_memory.cpp
View File

@ -8,7 +8,7 @@
#include <optional>
#include <utility>
#include <mcl/bit_cast.hpp>
#include <numeric>
#include <oaknut/oaknut.hpp>
#include "dynarmic/backend/arm64/abi.h"
@ -548,7 +548,7 @@ void FastmemEmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::In
FastmemPatchInfo{
.marker = marker,
.fc = FakeCall{
.call_pc = mcl::bit_cast<u64>(code.xptr<void*>()),
.call_pc = std::bit_cast<u64>(code.xptr<void*>()),
},
.recompile = ctx.conf.recompile_on_fastmem_failure,
});
@ -598,7 +598,7 @@ void FastmemEmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::I
FastmemPatchInfo{
.marker = marker,
.fc = FakeCall{
.call_pc = mcl::bit_cast<u64>(code.xptr<void*>()),
.call_pc = std::bit_cast<u64>(code.xptr<void*>()),
},
.recompile = ctx.conf.recompile_on_fastmem_failure,
});

4
src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
View File

@ -6,7 +6,7 @@
* SPDX-License-Identifier: 0BSD
*/
#include <mcl/bit_cast.hpp>
#include <numeric>
#include <mcl/mp/metavalue/lift_value.hpp>
#include <mcl/mp/typelist/cartesian_product.hpp>
#include <mcl/mp/typelist/get.hpp>
@ -269,7 +269,7 @@ static void EmitTwoOpFallbackWithoutRegAlloc(oaknut::CodeGenerator& code, EmitCo
ABI_PushRegisters(code, ABI_CALLER_SAVE & ~(1ull << Qresult.index()), stack_size);
code.MOV(Xscratch0, mcl::bit_cast<u64>(fn));
code.MOV(Xscratch0, std::bit_cast<u64>(fn));
code.ADD(X0, SP, 0 * 16);
code.ADD(X1, SP, 1 * 16);
code.MOV(X2, fpcr);

4
src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp
View File

@ -14,7 +14,7 @@
#include "dynarmic/common/assert.h"
#include <mcl/bit/bit_field.hpp>
#include <mcl/bit_cast.hpp>
#include <numeric>
#include <mcl/mp/metavalue/lift_value.hpp>
#include "dynarmic/common/common_types.h"
@ -245,7 +245,7 @@ void RegAlloc::AssertNoMoreUses() const {
}
void RegAlloc::EmitVerboseDebuggingOutput() {
code.MOV(X19, mcl::bit_cast<u64>(&PrintVerboseDebuggingOutputLine)); // Non-volatile register
code.MOV(X19, std::bit_cast<u64>(&PrintVerboseDebuggingOutputLine)); // Non-volatile register
const auto do_location = [&](HostLocInfo& info, HostLocType type, size_t index) {
using namespace oaknut::util;

8
src/dynarmic/src/dynarmic/backend/exception_handler_macos.cpp
View File

@ -19,7 +19,7 @@
#include <fmt/format.h>
#include "dynarmic/common/assert.h"
#include <mcl/bit_cast.hpp>
#include <numeric>
#include <mcl/macro/architecture.hpp>
#include "dynarmic/common/common_types.h"
@ -146,7 +146,7 @@ kern_return_t MachHandler::HandleRequest(x86_thread_state64_t* ts) {
FakeCall fc = iter->cb(ts->__rip);
ts->__rsp -= sizeof(u64);
*mcl::bit_cast<u64*>(ts->__rsp) = fc.ret_rip;
*std::bit_cast<u64*>(ts->__rsp) = fc.ret_rip;
ts->__rip = fc.call_rip;
return KERN_SUCCESS;
@ -271,13 +271,13 @@ ExceptionHandler::~ExceptionHandler() = default;
#if defined(ARCHITECTURE_x86_64)
void ExceptionHandler::Register(X64::BlockOfCode& code) {
const u64 code_begin = mcl::bit_cast<u64>(code.getCode());
const u64 code_begin = std::bit_cast<u64>(code.getCode());
const u64 code_end = code_begin + code.GetTotalCodeSize();
impl = std::make_unique<Impl>(code_begin, code_end);
}
#elif defined(ARCHITECTURE_arm64)
void ExceptionHandler::Register(oaknut::CodeBlock& mem, std::size_t size) {
const u64 code_begin = mcl::bit_cast<u64>(mem.ptr());
const u64 code_begin = std::bit_cast<u64>(mem.ptr());
const u64 code_end = code_begin + size;
impl = std::make_unique<Impl>(code_begin, code_end);
}

10
src/dynarmic/src/dynarmic/backend/exception_handler_posix.cpp
View File

@ -27,7 +27,7 @@
#else
# error "Invalid architecture"
#endif
#include <mcl/bit_cast.hpp>
#include <numeric>
namespace Dynarmic::Backend {
@ -122,7 +122,7 @@ void SigHandler::SigAction(int sig, siginfo_t* info, void* raw_context) {
if (auto const iter = sig_handler->FindCodeBlockInfo(CTX_RIP); iter != sig_handler->code_block_infos.end()) {
FakeCall fc = iter->second.cb(CTX_RIP);
CTX_RSP -= sizeof(u64);
*mcl::bit_cast<u64*>(CTX_RSP) = fc.ret_rip;
*std::bit_cast<u64*>(CTX_RSP) = fc.ret_rip;
CTX_RIP = fc.call_rip;
return;
}
@ -189,15 +189,15 @@ ExceptionHandler::~ExceptionHandler() = default;
#if defined(MCL_ARCHITECTURE_X86_64)
void ExceptionHandler::Register(X64::BlockOfCode& code) {
impl = std::make_unique<Impl>(mcl::bit_cast<u64>(code.getCode()), code.GetTotalCodeSize());
impl = std::make_unique<Impl>(std::bit_cast<u64>(code.getCode()), code.GetTotalCodeSize());
}
#elif defined(MCL_ARCHITECTURE_ARM64)
void ExceptionHandler::Register(oaknut::CodeBlock& mem, std::size_t size) {
impl = std::make_unique<Impl>(mcl::bit_cast<u64>(mem.ptr()), size);
impl = std::make_unique<Impl>(std::bit_cast<u64>(mem.ptr()), size);
}
#elif defined(MCL_ARCHITECTURE_RISCV)
void ExceptionHandler::Register(RV64::CodeBlock& mem, std::size_t size) {
impl = std::make_unique<Impl>(mcl::bit_cast<u64>(mem.ptr<u64>()), size);
impl = std::make_unique<Impl>(std::bit_cast<u64>(mem.ptr<u64>()), size);
}
#else
# error "Invalid architecture"

4
src/dynarmic/src/dynarmic/backend/x64/a32_interface.cpp
View File

@ -13,7 +13,7 @@
#include <boost/icl/interval_set.hpp>
#include <fmt/format.h>
#include "dynarmic/common/assert.h"
#include <mcl/bit_cast.hpp>
#include <numeric>
#include <mcl/scope_exit.hpp>
#include "dynarmic/common/common_types.h"
@ -47,7 +47,7 @@ static RunCodeCallbacks GenRunCodeCallbacks(A32::UserCallbacks* cb, CodePtr (*Lo
static std::function<void(BlockOfCode&)> GenRCP(const A32::UserConfig& conf) {
return [conf](BlockOfCode& code) {
if (conf.page_table) {
code.mov(code.r14, mcl::bit_cast<u64>(conf.page_table));
code.mov(code.r14, std::bit_cast<u64>(conf.page_table));
}
if (conf.fastmem_pointer) {
code.mov(code.r13, *conf.fastmem_pointer);

4
src/dynarmic/src/dynarmic/backend/x64/a64_interface.cpp
View File

@ -12,7 +12,7 @@
#include <boost/icl/interval_set.hpp>
#include "dynarmic/common/assert.h"
#include <mcl/bit_cast.hpp>
#include <numeric>
#include <mcl/scope_exit.hpp>
#include "dynarmic/backend/x64/a64_emit_x64.h"
@ -43,7 +43,7 @@ static RunCodeCallbacks GenRunCodeCallbacks(A64::UserCallbacks* cb, CodePtr (*Lo
static std::function<void(BlockOfCode&)> GenRCP(const A64::UserConfig& conf) {
return [conf](BlockOfCode& code) {
if (conf.page_table) {
code.mov(code.r14, mcl::bit_cast<u64>(conf.page_table));
code.mov(code.r14, std::bit_cast<u64>(conf.page_table));
}
if (conf.fastmem_pointer) {
code.mov(code.r13, *conf.fastmem_pointer);

10
src/dynarmic/src/dynarmic/backend/x64/devirtualize.h
View File

@ -11,7 +11,7 @@
#include <cstring>
#include <utility>
#include <mcl/bit_cast.hpp>
#include <numeric>
#include "dynarmic/common/common_types.h"
#include <mcl/type_traits/function_info.hpp>
@ -42,7 +42,7 @@ ArgCallback DevirtualizeGeneric(mcl::class_type<decltype(mfp)>* this_) {
template<auto mfp>
ArgCallback DevirtualizeWindows(mcl::class_type<decltype(mfp)>* this_) {
static_assert(sizeof(mfp) == 8);
return ArgCallback{mcl::bit_cast<u64>(mfp), reinterpret_cast<u64>(this_)};
return ArgCallback{std::bit_cast<u64>(mfp), reinterpret_cast<u64>(this_)};
}
template<auto mfp>
@ -53,7 +53,7 @@ ArgCallback DevirtualizeItanium(mcl::class_type<decltype(mfp)>* this_) {
u64 ptr;
/// The required adjustment to `this`, prior to the call.
u64 adj;
} mfp_struct = mcl::bit_cast<MemberFunctionPointer>(mfp);
} mfp_struct = std::bit_cast<MemberFunctionPointer>(mfp);
static_assert(sizeof(MemberFunctionPointer) == 16);
static_assert(sizeof(MemberFunctionPointer) == sizeof(mfp));
@ -61,8 +61,8 @@ ArgCallback DevirtualizeItanium(mcl::class_type<decltype(mfp)>* this_) {
u64 fn_ptr = mfp_struct.ptr;
u64 this_ptr = reinterpret_cast<u64>(this_) + mfp_struct.adj;
if (mfp_struct.ptr & 1) {
u64 vtable = mcl::bit_cast_pointee<u64>(this_ptr);
fn_ptr = mcl::bit_cast_pointee<u64>(vtable + fn_ptr - 1);
u64 vtable = std::bit_cast<u64>(this_ptr);
fn_ptr = std::bit_cast<u64>(vtable + fn_ptr - 1);
}
return ArgCallback{fn_ptr, this_ptr};
}

24
src/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp
View File

@ -204,7 +204,7 @@ void PostProcessNaN(BlockOfCode& code, Xbyak::Xmm result, Xbyak::Xmm tmp) {
// We allow for the case where op1 and result are the same register. We do not read from op1 once result is written to.
template<size_t fsize>
void EmitPostProcessNaNs(BlockOfCode& code, Xbyak::Xmm result, Xbyak::Xmm op1, Xbyak::Xmm op2, Xbyak::Reg64 tmp, Xbyak::Label end) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
constexpr FPT exponent_mask = FP::FPInfo<FPT>::exponent_mask;
constexpr FPT mantissa_msb = FP::FPInfo<FPT>::mantissa_msb;
constexpr u8 mantissa_msb_bit = static_cast<u8>(FP::FPInfo<FPT>::explicit_mantissa_width - 1);
@ -298,7 +298,7 @@ void FPTwoOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
template<size_t fsize, typename Function>
void FPThreeOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
@ -357,7 +357,7 @@ void FPThreeOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn)
template<size_t fsize>
void FPAbs(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
constexpr FPT non_sign_mask = FP::FPInfo<FPT>::sign_mask - FPT(1u);
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
@ -383,7 +383,7 @@ void EmitX64::EmitFPAbs64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
void FPNeg(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
constexpr FPT sign_mask = FP::FPInfo<FPT>::sign_mask;
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
@ -473,7 +473,7 @@ static void EmitFPMinMax(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize, bool is_max>
static inline void EmitFPMinMaxNumeric(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) noexcept {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
constexpr FPT default_nan = FP::FPInfo<FPT>::DefaultNaN();
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
@ -625,7 +625,7 @@ void EmitX64::EmitFPMul64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize, bool negate_product>
static void EmitFPMulAdd(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
const auto fallback_fn = negate_product ? &FP::FPMulSub<FPT> : &FP::FPMulAdd<FPT>;
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
@ -852,7 +852,7 @@ void EmitX64::EmitFPMulSub64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitFPMulX(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
@ -912,7 +912,7 @@ void EmitX64::EmitFPMulX64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitFPRecipEstimate(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
if (fsize != 16) {
if (ctx.HasOptimization(OptimizationFlag::Unsafe_ReducedErrorFP)) {
@ -958,7 +958,7 @@ void EmitX64::EmitFPRecipEstimate64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitFPRecipExponent(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
ctx.reg_alloc.HostCall(inst, args[0]);
@ -981,7 +981,7 @@ void EmitX64::EmitFPRecipExponent64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitFPRecipStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
@ -1118,7 +1118,7 @@ void EmitX64::EmitFPRoundInt64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitFPRSqrtEstimate(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
if (fsize != 16) {
if (ctx.HasOptimization(OptimizationFlag::Unsafe_ReducedErrorFP)) {
@ -1297,7 +1297,7 @@ void EmitX64::EmitFPRSqrtEstimate64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitFPRSqrtStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
auto args = ctx.reg_alloc.GetArgumentInfo(inst);

37
src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc
View File

@ -4,6 +4,7 @@
*/
#include <mcl/macro/concatenate_tokens.hpp>
#include "dynarmic/common/fp/util.h"
#define AxxEmitX64 CONCATENATE_TOKENS(Axx, EmitX64)
#define AxxEmitContext CONCATENATE_TOKENS(Axx, EmitContext)
@ -102,10 +103,10 @@ void AxxEmitX64::EmitMemoryRead(AxxEmitContext& ctx, IR::Inst* inst) {
code.call(wrapped_fn);
fastmem_patch_info.emplace(
mcl::bit_cast<u64>(location),
std::bit_cast<u64>(location),
FastmemPatchInfo{
mcl::bit_cast<u64>(code.getCurr()),
mcl::bit_cast<u64>(wrapped_fn),
std::bit_cast<u64>(code.getCurr()),
std::bit_cast<u64>(wrapped_fn),
*fastmem_marker,
conf.recompile_on_fastmem_failure,
});
@ -189,10 +190,10 @@ void AxxEmitX64::EmitMemoryWrite(AxxEmitContext& ctx, IR::Inst* inst) {
code.call(wrapped_fn);
fastmem_patch_info.emplace(
mcl::bit_cast<u64>(location),
std::bit_cast<u64>(location),
FastmemPatchInfo{
mcl::bit_cast<u64>(code.getCurr()),
mcl::bit_cast<u64>(wrapped_fn),
std::bit_cast<u64>(code.getCurr()),
std::bit_cast<u64>(wrapped_fn),
*fastmem_marker,
conf.recompile_on_fastmem_failure,
});
@ -223,7 +224,7 @@ void AxxEmitX64::EmitExclusiveReadMemory(AxxEmitContext& ctx, IR::Inst* inst) {
const bool ordered = IsOrdered(args[2].GetImmediateAccType());
if constexpr (bitsize != 128) {
using T = UnsignedIntegerN<bitsize>;
using T = FP::UnsignedIntegerN<bitsize>;
ctx.reg_alloc.HostCall(inst, {}, args[1]);
@ -290,7 +291,7 @@ void AxxEmitX64::EmitExclusiveWriteMemory(AxxEmitContext& ctx, IR::Inst* inst) {
code.mov(code.byte[code.ABI_JIT_PTR + offsetof(AxxJitState, exclusive_state)], u8(0));
code.mov(code.ABI_PARAM1, reinterpret_cast<u64>(&conf));
if constexpr (bitsize != 128) {
using T = UnsignedIntegerN<bitsize>;
using T = FP::UnsignedIntegerN<bitsize>;
code.CallLambda(
[](AxxUserConfig& conf, Axx::VAddr vaddr, T value) -> u32 {
@ -356,7 +357,7 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in
EmitExclusiveLock(code, conf, tmp, tmp2.cvt32());
code.mov(code.byte[code.ABI_JIT_PTR + offsetof(AxxJitState, exclusive_state)], u8(1));
code.mov(tmp, mcl::bit_cast<u64>(GetExclusiveMonitorAddressPointer(conf.global_monitor, conf.processor_id)));
code.mov(tmp, std::bit_cast<u64>(GetExclusiveMonitorAddressPointer(conf.global_monitor, conf.processor_id)));
code.mov(qword[tmp], vaddr);
const auto fastmem_marker = ShouldFastmem(ctx, inst);
@ -369,10 +370,10 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in
const auto location = EmitReadMemoryMov<bitsize>(code, value_idx, src_ptr, ordered);
fastmem_patch_info.emplace(
mcl::bit_cast<u64>(location),
std::bit_cast<u64>(location),
FastmemPatchInfo{
mcl::bit_cast<u64>(code.getCurr()),
mcl::bit_cast<u64>(wrapped_fn),
std::bit_cast<u64>(code.getCurr()),
std::bit_cast<u64>(wrapped_fn),
*fastmem_marker,
conf.recompile_on_exclusive_fastmem_failure,
});
@ -390,7 +391,7 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in
code.call(wrapped_fn);
}
code.mov(tmp, mcl::bit_cast<u64>(GetExclusiveMonitorValuePointer(conf.global_monitor, conf.processor_id)));
code.mov(tmp, std::bit_cast<u64>(GetExclusiveMonitorValuePointer(conf.global_monitor, conf.processor_id)));
EmitWriteMemoryMov<bitsize>(code, tmp, value_idx, false);
EmitExclusiveUnlock(code, conf, tmp, tmp2.cvt32());
@ -437,7 +438,7 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i
SharedLabel end = GenSharedLabel();
code.mov(tmp, mcl::bit_cast<u64>(GetExclusiveMonitorAddressPointer(conf.global_monitor, conf.processor_id)));
code.mov(tmp, std::bit_cast<u64>(GetExclusiveMonitorAddressPointer(conf.global_monitor, conf.processor_id)));
code.mov(status, u32(1));
code.cmp(code.byte[code.ABI_JIT_PTR + offsetof(AxxJitState, exclusive_state)], u8(0));
code.je(*end, code.T_NEAR);
@ -447,7 +448,7 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i
EmitExclusiveTestAndClear(code, conf, vaddr, tmp, rax);
code.mov(code.byte[code.ABI_JIT_PTR + offsetof(AxxJitState, exclusive_state)], u8(0));
code.mov(tmp, mcl::bit_cast<u64>(GetExclusiveMonitorValuePointer(conf.global_monitor, conf.processor_id)));
code.mov(tmp, std::bit_cast<u64>(GetExclusiveMonitorValuePointer(conf.global_monitor, conf.processor_id)));
if constexpr (bitsize == 128) {
code.mov(rax, qword[tmp + 0]);
@ -506,10 +507,10 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i
code.call(wrapped_fn);
fastmem_patch_info.emplace(
mcl::bit_cast<u64>(location),
std::bit_cast<u64>(location),
FastmemPatchInfo{
mcl::bit_cast<u64>(code.getCurr()),
mcl::bit_cast<u64>(wrapped_fn),
std::bit_cast<u64>(code.getCurr()),
std::bit_cast<u64>(wrapped_fn),
*fastmem_marker,
conf.recompile_on_exclusive_fastmem_failure,
});

8
src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.h
View File

@ -3,7 +3,7 @@
* SPDX-License-Identifier: 0BSD
*/
#include <mcl/bit_cast.hpp>
#include <numeric>
#include <xbyak/xbyak.h>
#include "dynarmic/backend/x64/a32_emit_x64.h"
@ -342,7 +342,7 @@ void EmitExclusiveLock(BlockOfCode& code, const UserConfig& conf, Xbyak::Reg64 p
return;
}
code.mov(pointer, mcl::bit_cast<u64>(GetExclusiveMonitorLockPointer(conf.global_monitor)));
code.mov(pointer, std::bit_cast<u64>(GetExclusiveMonitorLockPointer(conf.global_monitor)));
EmitSpinLockLock(code, pointer, tmp);
}
@ -352,7 +352,7 @@ void EmitExclusiveUnlock(BlockOfCode& code, const UserConfig& conf, Xbyak::Reg64
return;
}
code.mov(pointer, mcl::bit_cast<u64>(GetExclusiveMonitorLockPointer(conf.global_monitor)));
code.mov(pointer, std::bit_cast<u64>(GetExclusiveMonitorLockPointer(conf.global_monitor)));
EmitSpinLockUnlock(code, pointer, tmp);
}
@ -369,7 +369,7 @@ void EmitExclusiveTestAndClear(BlockOfCode& code, const UserConfig& conf, Xbyak:
continue;
}
Xbyak::Label ok;
code.mov(pointer, mcl::bit_cast<u64>(GetExclusiveMonitorAddressPointer(conf.global_monitor, processor_index)));
code.mov(pointer, std::bit_cast<u64>(GetExclusiveMonitorAddressPointer(conf.global_monitor, processor_index)));
code.cmp(qword[pointer], vaddr);
code.jne(ok, code.T_NEAR);
code.mov(qword[pointer], tmp);

5
src/dynarmic/src/dynarmic/backend/x64/emit_x64_saturation.cpp
View File

@ -17,6 +17,7 @@
#include "dynarmic/ir/basic_block.h"
#include "dynarmic/ir/microinstruction.h"
#include "dynarmic/ir/opcodes.h"
#include "dynarmic/common/fp/util.h"
namespace Dynarmic::Backend::X64 {
@ -37,7 +38,7 @@ void EmitSignedSaturatedOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst)
Xbyak::Reg addend = ctx.reg_alloc.UseGpr(args[1]).changeBit(size);
Xbyak::Reg overflow = ctx.reg_alloc.ScratchGpr().changeBit(size);
constexpr u64 int_max = static_cast<u64>((std::numeric_limits<SignedIntegerN<size>>::max)());
constexpr u64 int_max = static_cast<u64>((std::numeric_limits<FP::SignedIntegerN<size>>::max)());
if constexpr (size < 64) {
code.xor_(overflow.cvt32(), overflow.cvt32());
code.bt(result.cvt32(), size - 1);
@ -81,7 +82,7 @@ void EmitUnsignedSaturatedOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst
Xbyak::Reg op_result = ctx.reg_alloc.UseScratchGpr(args[0]).changeBit(size);
Xbyak::Reg addend = ctx.reg_alloc.UseScratchGpr(args[1]).changeBit(size);
constexpr u64 boundary = op == Op::Add ? (std::numeric_limits<UnsignedIntegerN<size>>::max)() : 0;
constexpr u64 boundary = op == Op::Add ? (std::numeric_limits<FP::UnsignedIntegerN<size>>::max)() : 0;
if constexpr (op == Op::Add) {
code.add(op_result, addend);

38
src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp
View File

@ -75,7 +75,7 @@ void MaybeStandardFPSCRValue(BlockOfCode& code, EmitContext& ctx, bool fpcr_cont
template<size_t fsize, template<typename> class Indexer, size_t narg>
struct NaNHandler {
public:
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
using function_type = void (*)(std::array<VectorArray<FPT>, narg>&, FP::FPCR);
@ -157,33 +157,33 @@ Xbyak::Address GetVectorOf(BlockOfCode& code) {
template<size_t fsize>
Xbyak::Address GetNaNVector(BlockOfCode& code) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
return GetVectorOf<fsize, FP::FPInfo<FPT>::DefaultNaN()>(code);
}
template<size_t fsize>
Xbyak::Address GetNegativeZeroVector(BlockOfCode& code) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
return GetVectorOf<fsize, FP::FPInfo<FPT>::Zero(true)>(code);
}
template<size_t fsize>
Xbyak::Address GetNonSignMaskVector(BlockOfCode& code) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
constexpr FPT non_sign_mask = FP::FPInfo<FPT>::exponent_mask | FP::FPInfo<FPT>::mantissa_mask;
return GetVectorOf<fsize, non_sign_mask>(code);
}
template<size_t fsize>
Xbyak::Address GetSmallestNormalVector(BlockOfCode& code) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
constexpr FPT smallest_normal_number = FP::FPValue<FPT, false, FP::FPInfo<FPT>::exponent_min, 1>();
return GetVectorOf<fsize, smallest_normal_number>(code);
}
template<size_t fsize, bool sign, int exponent, UnsignedIntegerN<fsize> value>
template<size_t fsize, bool sign, int exponent, FP::UnsignedIntegerN<fsize> value>
Xbyak::Address GetVectorOf(BlockOfCode& code) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
return GetVectorOf<fsize, FP::FPValue<FPT, sign, exponent, value>()>(code);
}
@ -1084,7 +1084,7 @@ static void EmitFPVectorMinMaxNumeric(BlockOfCode& code, EmitContext& ctx, IR::I
if (code.HasHostFeature(HostFeature::AVX)) {
MaybeStandardFPSCRValue(code, ctx, fpcr_controlled, [&] {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
// result = xmm_a == SNaN || xmm_b == QNaN
{
@ -1157,7 +1157,7 @@ static void EmitFPVectorMinMaxNumeric(BlockOfCode& code, EmitContext& ctx, IR::I
}
MaybeStandardFPSCRValue(code, ctx, fpcr_controlled, [&] {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
// result = xmm_a == SNaN || xmm_b == QNaN
{
@ -1313,7 +1313,7 @@ static void EmitFPVectorMulAddFallback(VectorArray<FPT>& result, const VectorArr
template<size_t fsize>
void EmitFPVectorMulAdd(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
const auto fallback_fn = [](VectorArray<FPT>& result, const VectorArray<FPT>& addend, const VectorArray<FPT>& op1, const VectorArray<FPT>& op2, FP::FPCR fpcr, FP::FPSR& fpsr) {
for (size_t i = 0; i < result.size(); i++) {
@ -1424,7 +1424,7 @@ void EmitX64::EmitFPVectorMulAdd64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitFPVectorMulX(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
const bool fpcr_controlled = args[2].GetImmediateU1();
@ -1490,7 +1490,7 @@ void EmitX64::EmitFPVectorMulX64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
void FPVectorNeg(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
constexpr FPT sign_mask = FP::FPInfo<FPT>::sign_mask;
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
@ -1543,7 +1543,7 @@ void EmitX64::EmitFPVectorPairedAddLower64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitRecipEstimate(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
if constexpr (fsize != 16) {
if (ctx.HasOptimization(OptimizationFlag::Unsafe_ReducedErrorFP)) {
@ -1589,7 +1589,7 @@ void EmitX64::EmitFPVectorRecipEstimate64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitRecipStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
const auto fallback_fn = [](VectorArray<FPT>& result, const VectorArray<FPT>& op1, const VectorArray<FPT>& op2, FP::FPCR fpcr, FP::FPSR& fpsr) {
for (size_t i = 0; i < result.size(); i++) {
@ -1713,7 +1713,7 @@ void EmitFPVectorRoundInt(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
}
// Do not make a LUT out of this, let the compiler do it's thing
using FPT = mcl::unsigned_integer_of_size<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
switch (rounding) {
case FP::RoundingMode::ToNearest_TieEven:
exact
@ -1759,7 +1759,7 @@ void EmitX64::EmitFPVectorRoundInt64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitRSqrtEstimate(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
const auto fallback_fn = [](VectorArray<FPT>& result, const VectorArray<FPT>& operand, FP::FPCR fpcr, FP::FPSR& fpsr) {
for (size_t i = 0; i < result.size(); i++) {
@ -1851,7 +1851,7 @@ void EmitX64::EmitFPVectorRSqrtEstimate64(EmitContext& ctx, IR::Inst* inst) {
template<size_t fsize>
static void EmitRSqrtStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
using FPT = UnsignedIntegerN<fsize>;
using FPT = FP::UnsignedIntegerN<fsize>;
const auto fallback_fn = [](VectorArray<FPT>& result, const VectorArray<FPT>& op1, const VectorArray<FPT>& op2, FP::FPCR fpcr, FP::FPSR& fpsr) {
for (size_t i = 0; i < result.size(); i++) {
@ -2125,7 +2125,7 @@ void EmitFPVectorToFixed(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
FCODE(orp)(src, exceed_unsigned);
}
} else {
using FPT = UnsignedIntegerN<fsize>; // WORKAROUND: For issue 678 on MSVC
using FPT = FP::UnsignedIntegerN<fsize>; // WORKAROUND: For issue 678 on MSVC
constexpr u64 integer_max = FPT((std::numeric_limits<std::conditional_t<unsigned_, FPT, std::make_signed_t<FPT>>>::max)());
code.movaps(xmm0, GetVectorOf<fsize, float_upper_limit_signed>(code));
@ -2149,7 +2149,7 @@ void EmitFPVectorToFixed(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
mp::lift_value<FP::RoundingMode::ToNearest_TieAwayFromZero>>;
static const auto lut = Common::GenerateLookupTableFromList([]<typename I>(I) {
using FPT = UnsignedIntegerN<fsize>; // WORKAROUND: For issue 678 on MSVC
using FPT = FP::UnsignedIntegerN<fsize>; // WORKAROUND: For issue 678 on MSVC
return std::pair{
mp::lower_to_tuple_v<I>,
Common::FptrCast([](VectorArray<FPT>& output, const VectorArray<FPT>& input, FP::FPCR fpcr, FP::FPSR& fpsr) {

8
src/dynarmic/src/dynarmic/backend/x64/exception_handler_windows.cpp
View File

@ -13,7 +13,7 @@
#include <vector>
#include "dynarmic/common/assert.h"
#include <mcl/bit_cast.hpp>
#include <numeric>
#include "dynarmic/common/common_types.h"
#include "dynarmic/backend/exception_handler.h"
@ -184,20 +184,20 @@ struct ExceptionHandler::Impl final {
// Our 3rd argument is a PCONTEXT.
// If not within our codeblock, ignore this exception.
code.mov(code.rax, Safe::Negate(mcl::bit_cast<u64>(code.getCode())));
code.mov(code.rax, Safe::Negate(std::bit_cast<u64>(code.getCode())));
code.add(code.rax, code.qword[code.ABI_PARAM3 + Xbyak::RegExp(offsetof(CONTEXT, Rip))]);
code.cmp(code.rax, static_cast<u32>(code.GetTotalCodeSize()));
code.ja(exception_handler_without_cb);
code.lea(code.rsp, code.ptr[code.rsp - 8]);
code.mov(code.ABI_PARAM1, mcl::bit_cast<u64>(&cb));
code.mov(code.ABI_PARAM1, std::bit_cast<u64>(&cb));
code.mov(code.ABI_PARAM2, code.ABI_PARAM3);
code.CallLambda(
[](const std::function<FakeCall(u64)>& cb_, PCONTEXT ctx) {
FakeCall fc = cb_(ctx->Rip);
ctx->Rsp -= sizeof(u64);
*mcl::bit_cast<u64*>(ctx->Rsp) = fc.ret_rip;
*std::bit_cast<u64*>(ctx->Rsp) = fc.ret_rip;
ctx->Rip = fc.call_rip;
});
code.add(code.rsp, 8);

4
src/dynarmic/src/dynarmic/backend/x64/perf_map.h
View File

@ -7,7 +7,7 @@
#include <string_view>
#include <mcl/bit_cast.hpp>
#include <numeric>
namespace Dynarmic::Backend::X64 {
@ -17,7 +17,7 @@ void PerfMapRegister(const void* start, const void* end, std::string_view friend
template<typename T>
void PerfMapRegister(T start, const void* end, std::string_view friendly_name) {
detail::PerfMapRegister(mcl::bit_cast<const void*>(start), end, friendly_name);
detail::PerfMapRegister(std::bit_cast<const void*>(start), end, friendly_name);
}
void PerfMapClear();

2
src/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp
View File

@ -14,7 +14,7 @@
#include <fmt/ostream.h>
#include "dynarmic/common/assert.h"
#include <mcl/bit_cast.hpp>
#include <numeric>
#include <xbyak/xbyak.h>
#include "dynarmic/backend/x64/abi.h"

45
src/dynarmic/src/dynarmic/common/assert.h
View File

@ -16,38 +16,33 @@ template<typename... Ts>
// Temporary until MCL is fully removed
#ifndef ASSERT_MSG
#define ASSERT_MSG(_a_, ...) \
([&]() { \
if (!(_a_)) [[unlikely]] { \
assert_terminate(#_a_, __VA_ARGS__); \
} \
}())
# define ASSERT_MSG(_a_, ...) do if (!(_a_)) [[unlikely]] assert_terminate(#_a_, __VA_ARGS__); while(0)
#endif
#ifndef ASSERT_FALSE
#define ASSERT_FALSE(...) \
([&]() { \
assert_terminate("false", __VA_ARGS__); \
}())
# define ASSERT_FALSE(...) assert_terminate("false", __VA_ARGS__)
#endif
#ifndef ASSERT
#define ASSERT(_a_) ASSERT_MSG(_a_, "")
# define ASSERT(_a_) ASSERT_MSG(_a_, "")
#endif
#ifndef UNREACHABLE
#define UNREACHABLE() ASSERT_MSG(false, "unreachable")
# ifdef _MSC_VER
# define UNREACHABLE() ASSERT_FALSE("unreachable")
# else
# define UNREACHABLE() __builtin_unreachable();
# endif
#endif
#ifdef _DEBUG
#ifndef DEBUG_ASSERT
#define DEBUG_ASSERT(_a_) ASSERT(_a_)
#endif
#ifndef DEBUG_ASSERT_MSG
#define DEBUG_ASSERT_MSG(_a_, ...) ASSERT_MSG(_a_, __VA_ARGS__)
#endif
# ifndef DEBUG_ASSERT
# define DEBUG_ASSERT(_a_) ASSERT(_a_)
# endif
# ifndef DEBUG_ASSERT_MSG
# define DEBUG_ASSERT_MSG(_a_, ...) ASSERT_MSG(_a_, __VA_ARGS__)
# endif
#else // not debug
#ifndef DEBUG_ASSERT
#define DEBUG_ASSERT(_a_)
#endif
#ifndef DEBUG_ASSERT_MSG
#define DEBUG_ASSERT_MSG(_a_, _desc_, ...)
#endif
# ifndef DEBUG_ASSERT
# define DEBUG_ASSERT(_a_)
# endif
# ifndef DEBUG_ASSERT_MSG
# define DEBUG_ASSERT_MSG(_a_, _desc_, ...)
# endif
#endif

4
src/dynarmic/src/dynarmic/common/fp/util.h
View File

@ -104,7 +104,7 @@ template<> struct IntegerOfSize<16> { using U = std::uint16_t, S = std::int16_t;
template<> struct IntegerOfSize<32> { using U = std::uint32_t, S = std::int32_t; };
template<> struct IntegerOfSize<64> { using U = std::uint64_t, S = std::int64_t; };
}
using UnsignedIntegerN = typename Detail::IntegerOfSize<size>::U;
using SignedIntegerN = typename Detail::IntegerOfSize<size>::S;
template<size_t N> using FP::UnsignedIntegerN = typename Detail::IntegerOfSize<N>::U;
template<size_t N> using FP::SignedIntegerN = typename Detail::IntegerOfSize<N>::S;
} // namespace Dynarmic::FP

4
src/dynarmic/src/dynarmic/common/llvm_disassemble.cpp
View File

@ -16,7 +16,7 @@
#endif
#include "dynarmic/common/assert.h"
#include <mcl/bit_cast.hpp>
#include <numeric>
#include "dynarmic/common/common_types.h"
#include "dynarmic/common/llvm_disassemble.h"
@ -53,7 +53,7 @@ std::string DisassembleX64(const void* begin, const void* end) {
LLVMDisasmDispose(llvm_ctx);
#else
result += fmt::format("(recompile with DYNARMIC_USE_LLVM=ON to disassemble the generated x86_64 code)\n");
result += fmt::format("start: {:016x}, end: {:016x}\n", mcl::bit_cast<u64>(begin), mcl::bit_cast<u64>(end));
result += fmt::format("start: {:016x}, end: {:016x}\n", std::bit_cast<u64>(begin), std::bit_cast<u64>(end));
#endif
return result;

2
src/dynarmic/src/dynarmic/ir/ir_emitter.cpp
View File

@ -11,7 +11,7 @@
#include <vector>
#include "dynarmic/common/assert.h"
#include <mcl/bit_cast.hpp>
#include <numeric>
#include "dynarmic/ir/opcodes.h"

10
src/dynarmic/src/dynarmic/ir/ir_emitter.h
View File

@ -12,7 +12,7 @@
#include "dynarmic/common/common_types.h"
#include "dynarmic/common/assert.h"
#include <mcl/bit_cast.hpp>
#include <numeric>
#include "dynarmic/ir/opcodes.h"
#include "dynarmic/ir/acc_type.h"
@ -2931,19 +2931,19 @@ public:
}
void CallHostFunction(void (*fn)(void)) {
Inst(Opcode::CallHostFunction, Imm64(mcl::bit_cast<u64>(fn)), Value{}, Value{}, Value{});
Inst(Opcode::CallHostFunction, Imm64(std::bit_cast<u64>(fn)), Value{}, Value{}, Value{});
}
void CallHostFunction(void (*fn)(u64), const U64& arg1) {
Inst(Opcode::CallHostFunction, Imm64(mcl::bit_cast<u64>(fn)), arg1, Value{}, Value{});
Inst(Opcode::CallHostFunction, Imm64(std::bit_cast<u64>(fn)), arg1, Value{}, Value{});
}
void CallHostFunction(void (*fn)(u64, u64), const U64& arg1, const U64& arg2) {
Inst(Opcode::CallHostFunction, Imm64(mcl::bit_cast<u64>(fn)), arg1, arg2, Value{});
Inst(Opcode::CallHostFunction, Imm64(std::bit_cast<u64>(fn)), arg1, arg2, Value{});
}
void CallHostFunction(void (*fn)(u64, u64, u64), const U64& arg1, const U64& arg2, const U64& arg3) {
Inst(Opcode::CallHostFunction, Imm64(mcl::bit_cast<u64>(fn)), arg1, arg2, arg3);
Inst(Opcode::CallHostFunction, Imm64(std::bit_cast<u64>(fn)), arg1, arg2, arg3);
}
void SetTerm(const Terminal& terminal) {

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