fuck reg pressure

Signed-off-by: lizzie <lizzie@eden-emu.dev>

src/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp

@@ -444,18 +444,18 @@ HostLoc RegAlloc::SelectARegister(const boost::container::static_vector<HostLoc,
             it_empty_candidate = it;
             break;
         // No empty registers for some reason (very evil) - just do normal LRU
-        } else {
-            if (loc_info.lru_counter < min_lru_counter) {
-                // Otherwise a "quasi"-LRU
-                min_lru_counter = loc_info.lru_counter;
-                if (*it >= HostLoc::R8 && *it <= HostLoc::R15) {
-                    it_rex_candidate = it;
-                } else {
-                    it_candidate = it;
-                }
-                if (min_lru_counter == 0)
-                    break; //early exit
+        } else if (loc_info.lru_counter < min_lru_counter) {
+            // Otherwise a "quasi"-LRU
+            min_lru_counter = loc_info.lru_counter;
+            if (*it >= HostLoc::R8 && *it <= HostLoc::R15) {
+                it_rex_candidate = it;
+            } else {
+                it_candidate = it;
             }
+            // There used to be a break here - DO NOT BREAK away you MUST
+            // evaluate ALL of the registers BEFORE making a decision on when to take
+            // otherwise reg pressure will get high and bugs will seep :)
+            // TODO(lizzie): Investigate these god awful annoying reg pressure issues
         }
     }
     // Final resolution goes as follows:

src/dynarmic/src/dynarmic/backend/x64/reg_alloc.h

@@ -94,8 +94,8 @@ private:
     uint16_t is_being_used_count = 0; //8
     uint16_t current_references = 0; //8
     // Value state
-    uint8_t max_bit_width : 4 = 0; //Valid values: log2(1,2,4,8,16,32,128) = (0, 1, 2, 3, 4, 5, 6)
     uint8_t lru_counter : 2 = 0; //1
+    uint8_t max_bit_width : 4 = 0; //Valid values: log2(1,2,4,8,16,32,128) = (0, 1, 2, 3, 4, 5, 6)
     bool is_scratch : 1 = false; //1
     bool is_set_last_use : 1 = false; //1
     friend class RegAlloc;