From 12e0ecb440f5d488f8ee224ebf15689ce68257f9 Mon Sep 17 00:00:00 2001 From: lizzie Date: Thu, 6 Nov 2025 19:03:59 +0000 Subject: [PATCH] A64checkbit Signed-off-by: lizzie --- .../src/dynarmic/backend/ppc64/a32_core.h | 1 + .../src/dynarmic/backend/ppc64/a64_core.h | 1 + .../src/dynarmic/backend/ppc64/emit_ppc64.cpp | 26 ++++++++++++++----- .../dynarmic/backend/ppc64/emit_ppc64_a64.cpp | 3 ++- 4 files changed, 24 insertions(+), 7 deletions(-) diff --git a/src/dynarmic/src/dynarmic/backend/ppc64/a32_core.h b/src/dynarmic/src/dynarmic/backend/ppc64/a32_core.h index 51309df704..a84185dd37 100644 --- a/src/dynarmic/src/dynarmic/backend/ppc64/a32_core.h +++ b/src/dynarmic/src/dynarmic/backend/ppc64/a32_core.h @@ -22,6 +22,7 @@ struct A32JitState { u32 exclusive_state = 0; u32 cpsr_nzcv = 0; u32 fpscr = 0; + u8 check_bit = 0; IR::LocationDescriptor GetLocationDescriptor() const { return IR::LocationDescriptor{regs[15] | (u64(upper_location_descriptor) << 32)}; } diff --git a/src/dynarmic/src/dynarmic/backend/ppc64/a64_core.h b/src/dynarmic/src/dynarmic/backend/ppc64/a64_core.h index 5d79a47036..0f955a9e5b 100644 --- a/src/dynarmic/src/dynarmic/backend/ppc64/a64_core.h +++ b/src/dynarmic/src/dynarmic/backend/ppc64/a64_core.h @@ -28,6 +28,7 @@ struct A64JitState { u32 fpcr = 0; u32 fpsr = 0; volatile u32 halt_reason = 0; + u8 check_bit = 0; IR::LocationDescriptor GetLocationDescriptor() const { return IR::LocationDescriptor{regs[15] | (u64(upper_location_descriptor) << 32)}; } diff --git a/src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64.cpp b/src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64.cpp index 4f3fcff594..e6da30be82 100644 --- a/src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64.cpp +++ b/src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64.cpp @@ -9,6 +9,8 @@ #include #include +#include "a32_core.h" +#include "a64_core.h" #include "abi.h" #include "dynarmic/backend/ppc64/a32_core.h" #include "dynarmic/backend/ppc64/a64_core.h" @@ -141,6 +143,8 @@ void EmitIR(powah::Context&, EmitContext&, IR:: } namespace { +void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::Terminal terminal, IR::LocationDescriptor initial_location, bool is_single_step); + void EmitTerminal(powah::Context&, EmitContext&, IR::Term::Interpret, IR::LocationDescriptor, bool) { ASSERT(false && "unimp"); } @@ -151,13 +155,11 @@ void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::ReturnToDisp void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::LinkBlock terminal, IR::LocationDescriptor initial_location, bool) { auto const tmp = ctx.reg_alloc.ScratchGpr(); - if (ctx.emit_conf.a64_variant) { - code.LI(tmp, terminal.next.Value()); + code.LI(tmp, terminal.next.Value()); + if (ctx.emit_conf.a64_variant) code.STD(tmp, PPC64::RJIT, offsetof(A64JitState, pc)); - } else { - code.LI(tmp, terminal.next.Value()); + else code.STW(tmp, PPC64::RJIT, offsetof(A32JitState, regs) + sizeof(u32) * 15); - } } void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::LinkBlockFast terminal, IR::LocationDescriptor initial_location, bool) { @@ -177,7 +179,19 @@ void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::If terminal, } void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::CheckBit terminal, IR::LocationDescriptor initial_location, bool is_single_step) { - ASSERT(false && "unimp"); + powah::Label const l_else = code.DefineLabel(); + powah::Label const l_end = code.DefineLabel(); + auto const tmp = ctx.reg_alloc.ScratchGpr(); + code.LBZ(tmp, PPC64::RJIT, ctx.emit_conf.a64_variant ? offsetof(A64JitState, check_bit) : offsetof(A32JitState, check_bit)); + code.CMPLWI(tmp, 0); + code.BEQ(powah::CR0, l_else); + // CheckBit == 1 + EmitTerminal(code, ctx, terminal.then_, initial_location, is_single_step); + code.B(l_end); + // CheckBit == 0 + code.LABEL(l_else); + EmitTerminal(code, ctx, terminal.else_, initial_location, is_single_step); + code.LABEL(l_end); } void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::CheckHalt terminal, IR::LocationDescriptor initial_location, bool is_single_step) { diff --git a/src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64_a64.cpp b/src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64_a64.cpp index 195bca017f..0ed9a09c6e 100644 --- a/src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64_a64.cpp +++ b/src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64_a64.cpp @@ -18,7 +18,8 @@ namespace Dynarmic::Backend::PPC64 { template<> void EmitIR(powah::Context& code, EmitContext& ctx, IR::Inst* inst) { - ASSERT(false && "unimp"); + auto const value = ctx.reg_alloc.UseGpr(inst->GetArg(0)); + code.STB(value, PPC64::RJIT, offsetof(A64JitState, check_bit)); } template<>