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Merge pull request #2147 from ReinUsesLisp/texture-clean
Merge pull request #2147 from ReinUsesLisp/texture-clean
shader_ir: Remove "extras" from the MetaTexturence_cpp
bunnei
7 years ago
committed by
GitHub
GitHub
9 changed files with 590 additions and 527 deletions
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1CMakeModules/GenerateSCMRev.cmake
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1src/common/CMakeLists.txt
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1src/video_core/CMakeLists.txt
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25src/video_core/engines/shader_bytecode.h
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56src/video_core/renderer_opengl/gl_shader_decompiler.cpp
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1src/video_core/shader/decode.cpp
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493src/video_core/shader/decode/memory.cpp
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534src/video_core/shader/decode/texture.cpp
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5src/video_core/shader/shader_ir.h
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// Copyright 2019 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <algorithm>
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#include <vector>
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#include <fmt/format.h>
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader { |
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using Tegra::Shader::Instruction; |
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using Tegra::Shader::OpCode; |
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using Tegra::Shader::Register; |
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using Tegra::Shader::TextureMiscMode; |
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using Tegra::Shader::TextureProcessMode; |
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using Tegra::Shader::TextureType; |
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static std::size_t GetCoordCount(TextureType texture_type) { |
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switch (texture_type) { |
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case TextureType::Texture1D: |
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return 1; |
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case TextureType::Texture2D: |
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return 2; |
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case TextureType::Texture3D: |
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case TextureType::TextureCube: |
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return 3; |
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default: |
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UNIMPLEMENTED_MSG("Unhandled texture type: {}", static_cast<u32>(texture_type)); |
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return 0; |
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} |
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} |
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u32 ShaderIR::DecodeTexture(NodeBlock& bb, u32 pc) { |
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const Instruction instr = {program_code[pc]}; |
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const auto opcode = OpCode::Decode(instr); |
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switch (opcode->get().GetId()) { |
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case OpCode::Id::TEX: { |
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UNIMPLEMENTED_IF_MSG(instr.tex.UsesMiscMode(TextureMiscMode::AOFFI), |
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"AOFFI is not implemented"); |
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if (instr.tex.UsesMiscMode(TextureMiscMode::NODEP)) { |
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LOG_WARNING(HW_GPU, "TEX.NODEP implementation is incomplete"); |
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} |
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const TextureType texture_type{instr.tex.texture_type}; |
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const bool is_array = instr.tex.array != 0; |
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const bool depth_compare = instr.tex.UsesMiscMode(TextureMiscMode::DC); |
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const auto process_mode = instr.tex.GetTextureProcessMode(); |
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WriteTexInstructionFloat( |
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bb, instr, GetTexCode(instr, texture_type, process_mode, depth_compare, is_array)); |
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break; |
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} |
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case OpCode::Id::TEXS: { |
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const TextureType texture_type{instr.texs.GetTextureType()}; |
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const bool is_array{instr.texs.IsArrayTexture()}; |
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const bool depth_compare = instr.texs.UsesMiscMode(TextureMiscMode::DC); |
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const auto process_mode = instr.texs.GetTextureProcessMode(); |
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if (instr.texs.UsesMiscMode(TextureMiscMode::NODEP)) { |
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LOG_WARNING(HW_GPU, "TEXS.NODEP implementation is incomplete"); |
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} |
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const Node4 components = |
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GetTexsCode(instr, texture_type, process_mode, depth_compare, is_array); |
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if (instr.texs.fp32_flag) { |
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WriteTexsInstructionFloat(bb, instr, components); |
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} else { |
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WriteTexsInstructionHalfFloat(bb, instr, components); |
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} |
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break; |
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} |
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case OpCode::Id::TLD4: { |
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ASSERT(instr.tld4.array == 0); |
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UNIMPLEMENTED_IF_MSG(instr.tld4.UsesMiscMode(TextureMiscMode::AOFFI), |
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"AOFFI is not implemented"); |
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UNIMPLEMENTED_IF_MSG(instr.tld4.UsesMiscMode(TextureMiscMode::NDV), |
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"NDV is not implemented"); |
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UNIMPLEMENTED_IF_MSG(instr.tld4.UsesMiscMode(TextureMiscMode::PTP), |
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"PTP is not implemented"); |
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if (instr.tld4.UsesMiscMode(TextureMiscMode::NODEP)) { |
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LOG_WARNING(HW_GPU, "TLD4.NODEP implementation is incomplete"); |
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} |
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const auto texture_type = instr.tld4.texture_type.Value(); |
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const bool depth_compare = instr.tld4.UsesMiscMode(TextureMiscMode::DC); |
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const bool is_array = instr.tld4.array != 0; |
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WriteTexInstructionFloat(bb, instr, |
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GetTld4Code(instr, texture_type, depth_compare, is_array)); |
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break; |
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} |
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case OpCode::Id::TLD4S: { |
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UNIMPLEMENTED_IF_MSG(instr.tld4s.UsesMiscMode(TextureMiscMode::AOFFI), |
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"AOFFI is not implemented"); |
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if (instr.tld4s.UsesMiscMode(TextureMiscMode::NODEP)) { |
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LOG_WARNING(HW_GPU, "TLD4S.NODEP implementation is incomplete"); |
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} |
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const bool depth_compare = instr.tld4s.UsesMiscMode(TextureMiscMode::DC); |
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const Node op_a = GetRegister(instr.gpr8); |
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const Node op_b = GetRegister(instr.gpr20); |
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// TODO(Subv): Figure out how the sampler type is encoded in the TLD4S instruction.
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std::vector<Node> coords; |
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if (depth_compare) { |
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// Note: TLD4S coordinate encoding works just like TEXS's
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const Node op_y = GetRegister(instr.gpr8.Value() + 1); |
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coords.push_back(op_a); |
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coords.push_back(op_y); |
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coords.push_back(op_b); |
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} else { |
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coords.push_back(op_a); |
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coords.push_back(op_b); |
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} |
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const Node component = Immediate(static_cast<u32>(instr.tld4s.component)); |
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const auto& sampler = |
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GetSampler(instr.sampler, TextureType::Texture2D, false, depth_compare); |
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Node4 values; |
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for (u32 element = 0; element < values.size(); ++element) { |
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auto coords_copy = coords; |
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MetaTexture meta{sampler, {}, {}, {}, {}, component, element}; |
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values[element] = Operation(OperationCode::TextureGather, meta, std::move(coords_copy)); |
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} |
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WriteTexsInstructionFloat(bb, instr, values); |
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break; |
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} |
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case OpCode::Id::TXQ: { |
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if (instr.txq.UsesMiscMode(TextureMiscMode::NODEP)) { |
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LOG_WARNING(HW_GPU, "TXQ.NODEP implementation is incomplete"); |
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} |
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// TODO: The new commits on the texture refactor, change the way samplers work.
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// Sadly, not all texture instructions specify the type of texture their sampler
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// uses. This must be fixed at a later instance.
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const auto& sampler = |
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GetSampler(instr.sampler, Tegra::Shader::TextureType::Texture2D, false, false); |
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u32 indexer = 0; |
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switch (instr.txq.query_type) { |
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case Tegra::Shader::TextureQueryType::Dimension: { |
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for (u32 element = 0; element < 4; ++element) { |
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if (!instr.txq.IsComponentEnabled(element)) { |
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continue; |
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} |
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MetaTexture meta{sampler, {}, {}, {}, {}, {}, element}; |
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const Node value = |
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Operation(OperationCode::TextureQueryDimensions, meta, GetRegister(instr.gpr8)); |
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SetTemporal(bb, indexer++, value); |
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} |
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for (u32 i = 0; i < indexer; ++i) { |
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SetRegister(bb, instr.gpr0.Value() + i, GetTemporal(i)); |
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} |
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break; |
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} |
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default: |
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UNIMPLEMENTED_MSG("Unhandled texture query type: {}", |
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static_cast<u32>(instr.txq.query_type.Value())); |
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} |
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break; |
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} |
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case OpCode::Id::TMML: { |
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UNIMPLEMENTED_IF_MSG(instr.tmml.UsesMiscMode(Tegra::Shader::TextureMiscMode::NDV), |
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"NDV is not implemented"); |
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if (instr.tmml.UsesMiscMode(TextureMiscMode::NODEP)) { |
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LOG_WARNING(HW_GPU, "TMML.NODEP implementation is incomplete"); |
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} |
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auto texture_type = instr.tmml.texture_type.Value(); |
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const bool is_array = instr.tmml.array != 0; |
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const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, false); |
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std::vector<Node> coords; |
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// TODO: Add coordinates for different samplers once other texture types are implemented.
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switch (texture_type) { |
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case TextureType::Texture1D: |
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coords.push_back(GetRegister(instr.gpr8)); |
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break; |
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case TextureType::Texture2D: |
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coords.push_back(GetRegister(instr.gpr8.Value() + 0)); |
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coords.push_back(GetRegister(instr.gpr8.Value() + 1)); |
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break; |
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default: |
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UNIMPLEMENTED_MSG("Unhandled texture type {}", static_cast<u32>(texture_type)); |
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// Fallback to interpreting as a 2D texture for now
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coords.push_back(GetRegister(instr.gpr8.Value() + 0)); |
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coords.push_back(GetRegister(instr.gpr8.Value() + 1)); |
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texture_type = TextureType::Texture2D; |
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} |
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for (u32 element = 0; element < 2; ++element) { |
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auto params = coords; |
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MetaTexture meta{sampler, {}, {}, {}, {}, {}, element}; |
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const Node value = Operation(OperationCode::TextureQueryLod, meta, std::move(params)); |
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SetTemporal(bb, element, value); |
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} |
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for (u32 element = 0; element < 2; ++element) { |
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SetRegister(bb, instr.gpr0.Value() + element, GetTemporal(element)); |
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} |
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break; |
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} |
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case OpCode::Id::TLDS: { |
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const Tegra::Shader::TextureType texture_type{instr.tlds.GetTextureType()}; |
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const bool is_array{instr.tlds.IsArrayTexture()}; |
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UNIMPLEMENTED_IF_MSG(instr.tlds.UsesMiscMode(TextureMiscMode::AOFFI), |
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"AOFFI is not implemented"); |
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UNIMPLEMENTED_IF_MSG(instr.tlds.UsesMiscMode(TextureMiscMode::MZ), "MZ is not implemented"); |
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if (instr.tlds.UsesMiscMode(TextureMiscMode::NODEP)) { |
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LOG_WARNING(HW_GPU, "TLDS.NODEP implementation is incomplete"); |
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} |
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WriteTexsInstructionFloat(bb, instr, GetTldsCode(instr, texture_type, is_array)); |
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break; |
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} |
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default: |
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UNIMPLEMENTED_MSG("Unhandled memory instruction: {}", opcode->get().GetName()); |
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} |
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return pc; |
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} |
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const Sampler& ShaderIR::GetSampler(const Tegra::Shader::Sampler& sampler, TextureType type, |
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bool is_array, bool is_shadow) { |
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const auto offset = static_cast<std::size_t>(sampler.index.Value()); |
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// If this sampler has already been used, return the existing mapping.
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const auto itr = |
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std::find_if(used_samplers.begin(), used_samplers.end(), |
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[&](const Sampler& entry) { return entry.GetOffset() == offset; }); |
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if (itr != used_samplers.end()) { |
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ASSERT(itr->GetType() == type && itr->IsArray() == is_array && |
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itr->IsShadow() == is_shadow); |
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return *itr; |
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} |
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// Otherwise create a new mapping for this sampler
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const std::size_t next_index = used_samplers.size(); |
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const Sampler entry{offset, next_index, type, is_array, is_shadow}; |
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return *used_samplers.emplace(entry).first; |
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} |
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void ShaderIR::WriteTexInstructionFloat(NodeBlock& bb, Instruction instr, const Node4& components) { |
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u32 dest_elem = 0; |
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for (u32 elem = 0; elem < 4; ++elem) { |
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if (!instr.tex.IsComponentEnabled(elem)) { |
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// Skip disabled components
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continue; |
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} |
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SetTemporal(bb, dest_elem++, components[elem]); |
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} |
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// After writing values in temporals, move them to the real registers
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for (u32 i = 0; i < dest_elem; ++i) { |
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SetRegister(bb, instr.gpr0.Value() + i, GetTemporal(i)); |
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} |
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} |
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void ShaderIR::WriteTexsInstructionFloat(NodeBlock& bb, Instruction instr, |
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const Node4& components) { |
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// TEXS has two destination registers and a swizzle. The first two elements in the swizzle
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// go into gpr0+0 and gpr0+1, and the rest goes into gpr28+0 and gpr28+1
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u32 dest_elem = 0; |
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for (u32 component = 0; component < 4; ++component) { |
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if (!instr.texs.IsComponentEnabled(component)) |
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continue; |
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SetTemporal(bb, dest_elem++, components[component]); |
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} |
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for (u32 i = 0; i < dest_elem; ++i) { |
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if (i < 2) { |
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// Write the first two swizzle components to gpr0 and gpr0+1
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SetRegister(bb, instr.gpr0.Value() + i % 2, GetTemporal(i)); |
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} else { |
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ASSERT(instr.texs.HasTwoDestinations()); |
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// Write the rest of the swizzle components to gpr28 and gpr28+1
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SetRegister(bb, instr.gpr28.Value() + i % 2, GetTemporal(i)); |
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} |
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} |
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} |
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void ShaderIR::WriteTexsInstructionHalfFloat(NodeBlock& bb, Instruction instr, |
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const Node4& components) { |
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// TEXS.F16 destionation registers are packed in two registers in pairs (just like any half
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// float instruction).
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Node4 values; |
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u32 dest_elem = 0; |
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for (u32 component = 0; component < 4; ++component) { |
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if (!instr.texs.IsComponentEnabled(component)) |
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continue; |
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values[dest_elem++] = components[component]; |
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} |
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if (dest_elem == 0) |
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return; |
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std::generate(values.begin() + dest_elem, values.end(), [&]() { return Immediate(0); }); |
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const Node first_value = Operation(OperationCode::HPack2, values[0], values[1]); |
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if (dest_elem <= 2) { |
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SetRegister(bb, instr.gpr0, first_value); |
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return; |
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} |
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SetTemporal(bb, 0, first_value); |
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SetTemporal(bb, 1, Operation(OperationCode::HPack2, values[2], values[3])); |
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SetRegister(bb, instr.gpr0, GetTemporal(0)); |
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SetRegister(bb, instr.gpr28, GetTemporal(1)); |
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} |
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Node4 ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type, |
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TextureProcessMode process_mode, std::vector<Node> coords, |
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Node array, Node depth_compare, u32 bias_offset) { |
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const bool is_array = array; |
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const bool is_shadow = depth_compare; |
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UNIMPLEMENTED_IF_MSG((texture_type == TextureType::Texture3D && (is_array || is_shadow)) || |
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(texture_type == TextureType::TextureCube && is_array && is_shadow), |
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"This method is not supported."); |
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const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, is_shadow); |
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const bool lod_needed = process_mode == TextureProcessMode::LZ || |
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process_mode == TextureProcessMode::LL || |
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process_mode == TextureProcessMode::LLA; |
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// LOD selection (either via bias or explicit textureLod) not supported in GL for
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// sampler2DArrayShadow and samplerCubeArrayShadow.
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const bool gl_lod_supported = |
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!((texture_type == Tegra::Shader::TextureType::Texture2D && is_array && is_shadow) || |
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(texture_type == Tegra::Shader::TextureType::TextureCube && is_array && is_shadow)); |
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const OperationCode read_method = |
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(lod_needed && gl_lod_supported) ? OperationCode::TextureLod : OperationCode::Texture; |
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UNIMPLEMENTED_IF(process_mode != TextureProcessMode::None && !gl_lod_supported); |
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Node bias = {}; |
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Node lod = {}; |
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if (process_mode != TextureProcessMode::None && gl_lod_supported) { |
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switch (process_mode) { |
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case TextureProcessMode::LZ: |
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lod = Immediate(0.0f); |
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break; |
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case TextureProcessMode::LB: |
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// If present, lod or bias are always stored in the register indexed by the gpr20
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// field with an offset depending on the usage of the other registers
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bias = GetRegister(instr.gpr20.Value() + bias_offset); |
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break; |
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case TextureProcessMode::LL: |
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lod = GetRegister(instr.gpr20.Value() + bias_offset); |
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break; |
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default: |
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UNIMPLEMENTED_MSG("Unimplemented process mode={}", static_cast<u32>(process_mode)); |
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break; |
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} |
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} |
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Node4 values; |
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for (u32 element = 0; element < values.size(); ++element) { |
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auto copy_coords = coords; |
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MetaTexture meta{sampler, array, depth_compare, bias, lod, {}, element}; |
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values[element] = Operation(read_method, meta, std::move(copy_coords)); |
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} |
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return values; |
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} |
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Node4 ShaderIR::GetTexCode(Instruction instr, TextureType texture_type, |
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TextureProcessMode process_mode, bool depth_compare, bool is_array) { |
||||
|
const bool lod_bias_enabled = |
||||
|
(process_mode != TextureProcessMode::None && process_mode != TextureProcessMode::LZ); |
||||
|
|
||||
|
const auto [coord_count, total_coord_count] = ValidateAndGetCoordinateElement( |
||||
|
texture_type, depth_compare, is_array, lod_bias_enabled, 4, 5); |
||||
|
// If enabled arrays index is always stored in the gpr8 field
|
||||
|
const u64 array_register = instr.gpr8.Value(); |
||||
|
// First coordinate index is the gpr8 or gpr8 + 1 when arrays are used
|
||||
|
const u64 coord_register = array_register + (is_array ? 1 : 0); |
||||
|
|
||||
|
std::vector<Node> coords; |
||||
|
for (std::size_t i = 0; i < coord_count; ++i) { |
||||
|
coords.push_back(GetRegister(coord_register + i)); |
||||
|
} |
||||
|
// 1D.DC in OpenGL the 2nd component is ignored.
|
||||
|
if (depth_compare && !is_array && texture_type == TextureType::Texture1D) { |
||||
|
coords.push_back(Immediate(0.0f)); |
||||
|
} |
||||
|
|
||||
|
const Node array = is_array ? GetRegister(array_register) : nullptr; |
||||
|
|
||||
|
Node dc{}; |
||||
|
if (depth_compare) { |
||||
|
// Depth is always stored in the register signaled by gpr20 or in the next register if lod
|
||||
|
// or bias are used
|
||||
|
const u64 depth_register = instr.gpr20.Value() + (lod_bias_enabled ? 1 : 0); |
||||
|
dc = GetRegister(depth_register); |
||||
|
} |
||||
|
|
||||
|
return GetTextureCode(instr, texture_type, process_mode, coords, array, dc, 0); |
||||
|
} |
||||
|
|
||||
|
Node4 ShaderIR::GetTexsCode(Instruction instr, TextureType texture_type, |
||||
|
TextureProcessMode process_mode, bool depth_compare, bool is_array) { |
||||
|
const bool lod_bias_enabled = |
||||
|
(process_mode != TextureProcessMode::None && process_mode != TextureProcessMode::LZ); |
||||
|
|
||||
|
const auto [coord_count, total_coord_count] = ValidateAndGetCoordinateElement( |
||||
|
texture_type, depth_compare, is_array, lod_bias_enabled, 4, 4); |
||||
|
// If enabled arrays index is always stored in the gpr8 field
|
||||
|
const u64 array_register = instr.gpr8.Value(); |
||||
|
// First coordinate index is stored in gpr8 field or (gpr8 + 1) when arrays are used
|
||||
|
const u64 coord_register = array_register + (is_array ? 1 : 0); |
||||
|
const u64 last_coord_register = |
||||
|
(is_array || !(lod_bias_enabled || depth_compare) || (coord_count > 2)) |
||||
|
? static_cast<u64>(instr.gpr20.Value()) |
||||
|
: coord_register + 1; |
||||
|
const u32 bias_offset = coord_count > 2 ? 1 : 0; |
||||
|
|
||||
|
std::vector<Node> coords; |
||||
|
for (std::size_t i = 0; i < coord_count; ++i) { |
||||
|
const bool last = (i == (coord_count - 1)) && (coord_count > 1); |
||||
|
coords.push_back(GetRegister(last ? last_coord_register : coord_register + i)); |
||||
|
} |
||||
|
|
||||
|
const Node array = is_array ? GetRegister(array_register) : nullptr; |
||||
|
|
||||
|
Node dc{}; |
||||
|
if (depth_compare) { |
||||
|
// Depth is always stored in the register signaled by gpr20 or in the next register if lod
|
||||
|
// or bias are used
|
||||
|
const u64 depth_register = instr.gpr20.Value() + (lod_bias_enabled ? 1 : 0); |
||||
|
dc = GetRegister(depth_register); |
||||
|
} |
||||
|
|
||||
|
return GetTextureCode(instr, texture_type, process_mode, coords, array, dc, bias_offset); |
||||
|
} |
||||
|
|
||||
|
Node4 ShaderIR::GetTld4Code(Instruction instr, TextureType texture_type, bool depth_compare, |
||||
|
bool is_array) { |
||||
|
const std::size_t coord_count = GetCoordCount(texture_type); |
||||
|
const std::size_t total_coord_count = coord_count + (is_array ? 1 : 0); |
||||
|
const std::size_t total_reg_count = total_coord_count + (depth_compare ? 1 : 0); |
||||
|
|
||||
|
// If enabled arrays index is always stored in the gpr8 field
|
||||
|
const u64 array_register = instr.gpr8.Value(); |
||||
|
// First coordinate index is the gpr8 or gpr8 + 1 when arrays are used
|
||||
|
const u64 coord_register = array_register + (is_array ? 1 : 0); |
||||
|
|
||||
|
std::vector<Node> coords; |
||||
|
for (size_t i = 0; i < coord_count; ++i) |
||||
|
coords.push_back(GetRegister(coord_register + i)); |
||||
|
|
||||
|
const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, depth_compare); |
||||
|
|
||||
|
Node4 values; |
||||
|
for (u32 element = 0; element < values.size(); ++element) { |
||||
|
auto coords_copy = coords; |
||||
|
MetaTexture meta{sampler, GetRegister(array_register), {}, {}, {}, {}, element}; |
||||
|
values[element] = Operation(OperationCode::TextureGather, meta, std::move(coords_copy)); |
||||
|
} |
||||
|
|
||||
|
return values; |
||||
|
} |
||||
|
|
||||
|
Node4 ShaderIR::GetTldsCode(Instruction instr, TextureType texture_type, bool is_array) { |
||||
|
const std::size_t type_coord_count = GetCoordCount(texture_type); |
||||
|
const bool lod_enabled = instr.tlds.GetTextureProcessMode() == TextureProcessMode::LL; |
||||
|
|
||||
|
// If enabled arrays index is always stored in the gpr8 field
|
||||
|
const u64 array_register = instr.gpr8.Value(); |
||||
|
// if is array gpr20 is used
|
||||
|
const u64 coord_register = is_array ? instr.gpr20.Value() : instr.gpr8.Value(); |
||||
|
|
||||
|
const u64 last_coord_register = |
||||
|
((type_coord_count > 2) || (type_coord_count == 2 && !lod_enabled)) && !is_array |
||||
|
? static_cast<u64>(instr.gpr20.Value()) |
||||
|
: coord_register + 1; |
||||
|
|
||||
|
std::vector<Node> coords; |
||||
|
for (std::size_t i = 0; i < type_coord_count; ++i) { |
||||
|
const bool last = (i == (type_coord_count - 1)) && (type_coord_count > 1); |
||||
|
coords.push_back(GetRegister(last ? last_coord_register : coord_register + i)); |
||||
|
} |
||||
|
|
||||
|
const Node array = is_array ? GetRegister(array_register) : nullptr; |
||||
|
// When lod is used always is in gpr20
|
||||
|
const Node lod = lod_enabled ? GetRegister(instr.gpr20) : Immediate(0); |
||||
|
|
||||
|
const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, false); |
||||
|
|
||||
|
Node4 values; |
||||
|
for (u32 element = 0; element < values.size(); ++element) { |
||||
|
auto coords_copy = coords; |
||||
|
MetaTexture meta{sampler, array, {}, {}, lod, {}, element}; |
||||
|
values[element] = Operation(OperationCode::TexelFetch, meta, std::move(coords_copy)); |
||||
|
} |
||||
|
return values; |
||||
|
} |
||||
|
|
||||
|
std::tuple<std::size_t, std::size_t> ShaderIR::ValidateAndGetCoordinateElement( |
||||
|
TextureType texture_type, bool depth_compare, bool is_array, bool lod_bias_enabled, |
||||
|
std::size_t max_coords, std::size_t max_inputs) { |
||||
|
const std::size_t coord_count = GetCoordCount(texture_type); |
||||
|
|
||||
|
std::size_t total_coord_count = coord_count + (is_array ? 1 : 0) + (depth_compare ? 1 : 0); |
||||
|
const std::size_t total_reg_count = total_coord_count + (lod_bias_enabled ? 1 : 0); |
||||
|
if (total_coord_count > max_coords || total_reg_count > max_inputs) { |
||||
|
UNIMPLEMENTED_MSG("Unsupported Texture operation"); |
||||
|
total_coord_count = std::min(total_coord_count, max_coords); |
||||
|
} |
||||
|
// 1D.DC OpenGL is using a vec3 but 2nd component is ignored later.
|
||||
|
total_coord_count += |
||||
|
(depth_compare && !is_array && texture_type == TextureType::Texture1D) ? 1 : 0; |
||||
|
|
||||
|
return {coord_count, total_coord_count}; |
||||
|
} |
||||
|
|
||||
|
} // namespace VideoCommon::Shader
|
||||
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