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@ -116,13 +116,25 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, const BasicBlock& code, u32 pc) { |
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switch (instr.ldst_sl.type.Value()) { |
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switch (instr.ldst_sl.type.Value()) { |
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case Tegra::Shader::StoreType::Bits32: |
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case Tegra::Shader::StoreType::Bits32: |
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SetRegister(bb, instr.gpr0, GetLmem(0)); |
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break; |
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case Tegra::Shader::StoreType::Bits64: { |
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SetTemporal(bb, 0, GetLmem(0)); |
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SetTemporal(bb, 1, GetLmem(4)); |
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SetRegister(bb, instr.gpr0, GetTemporal(0)); |
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SetRegister(bb, instr.gpr0.Value() + 1, GetTemporal(1)); |
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case Tegra::Shader::StoreType::Bits64: |
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case Tegra::Shader::StoreType::Bits128: { |
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const u32 count = [&]() { |
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switch (instr.ldst_sl.type.Value()) { |
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case Tegra::Shader::StoreType::Bits32: |
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return 1; |
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case Tegra::Shader::StoreType::Bits64: |
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return 2; |
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case Tegra::Shader::StoreType::Bits128: |
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return 4; |
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default: |
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UNREACHABLE(); |
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return 0; |
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} |
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}(); |
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for (u32 i = 0; i < count; ++i) |
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SetTemporal(bb, i, GetLmem(i * 4)); |
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for (u32 i = 0; i < count; ++i) |
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SetRegister(bb, instr.gpr0.Value() + i, GetTemporal(i)); |
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break; |
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break; |
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} |
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} |
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default: |
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default: |
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