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Merge pull request #4888 from lioncash/unicorn-remove
Merge pull request #4888 from lioncash/unicorn-remove
core: Remove usage of unicornnce_cpp
bunnei
5 years ago
committed by
GitHub
GitHub
18 changed files with 18 additions and 520 deletions
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3.gitmodules
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10.travis/linux-mingw/docker.sh
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2.travis/linux/docker.sh
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3.travis/macos/build.sh
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77CMakeLists.txt
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9CMakeModules/CopyYuzuUnicornDeps.cmake
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1externals/unicorn
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4src/core/CMakeLists.txt
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1src/core/arm/dynarmic/arm_dynarmic_32.cpp
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29src/core/arm/dynarmic/arm_dynarmic_64.cpp
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2src/core/arm/dynarmic/arm_dynarmic_64.h
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295src/core/arm/unicorn/arm_unicorn.cpp
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63src/core/arm/unicorn/arm_unicorn.h
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16src/core/hle/kernel/physical_core.cpp
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17src/core/hle/kernel/thread.cpp
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2src/yuzu/CMakeLists.txt
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2src/yuzu_cmd/CMakeLists.txt
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2src/yuzu_tester/CMakeLists.txt
@ -1,9 +0,0 @@ |
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function(copy_yuzu_unicorn_deps target_dir) |
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include(WindowsCopyFiles) |
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set(DLL_DEST "${CMAKE_BINARY_DIR}/bin/$<CONFIG>/") |
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windows_copy_files(${target_dir} ${UNICORN_DLL_DIR} ${DLL_DEST} |
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libgcc_s_seh-1.dll |
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libwinpthread-1.dll |
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unicorn.dll |
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) |
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endfunction(copy_yuzu_unicorn_deps) |
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@ -1,295 +0,0 @@ |
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// Copyright 2018 yuzu emulator team
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <algorithm>
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#include <unicorn/arm64.h>
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#include "common/assert.h"
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#include "common/microprofile.h"
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#include "core/arm/cpu_interrupt_handler.h"
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#include "core/arm/unicorn/arm_unicorn.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/hle/kernel/scheduler.h"
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#include "core/hle/kernel/svc.h"
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#include "core/memory.h"
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namespace Core { |
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// Load Unicorn DLL once on Windows using RAII
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#ifdef _MSC_VER
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#include <unicorn_dynload.h>
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struct LoadDll { |
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private: |
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LoadDll() { |
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ASSERT(uc_dyn_load(NULL, 0)); |
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} |
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~LoadDll() { |
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ASSERT(uc_dyn_free()); |
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} |
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static LoadDll g_load_dll; |
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}; |
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LoadDll LoadDll::g_load_dll; |
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#endif
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#define CHECKED(expr) \
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do { \ |
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if (auto _cerr = (expr)) { \ |
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ASSERT_MSG(false, "Call " #expr " failed with error: {} ({})\n", _cerr, \ |
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uc_strerror(_cerr)); \ |
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} \ |
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} while (0) |
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static void CodeHook(uc_engine* uc, uint64_t address, uint32_t size, void* user_data) { |
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GDBStub::BreakpointAddress bkpt = |
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GDBStub::GetNextBreakpointFromAddress(address, GDBStub::BreakpointType::Execute); |
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if (GDBStub::IsMemoryBreak() || |
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(bkpt.type != GDBStub::BreakpointType::None && address == bkpt.address)) { |
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auto core = static_cast<ARM_Unicorn*>(user_data); |
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core->RecordBreak(bkpt); |
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uc_emu_stop(uc); |
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} |
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} |
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static bool UnmappedMemoryHook(uc_engine* uc, uc_mem_type type, u64 addr, int size, u64 value, |
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void* user_data) { |
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auto* const system = static_cast<System*>(user_data); |
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ARM_Interface::ThreadContext64 ctx{}; |
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system->CurrentArmInterface().SaveContext(ctx); |
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ASSERT_MSG(false, "Attempted to read from unmapped memory: 0x{:X}, pc=0x{:X}, lr=0x{:X}", addr, |
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ctx.pc, ctx.cpu_registers[30]); |
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return false; |
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} |
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ARM_Unicorn::ARM_Unicorn(System& system, CPUInterrupts& interrupt_handlers, bool uses_wall_clock, |
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Arch architecture, std::size_t core_index) |
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: ARM_Interface{system, interrupt_handlers, uses_wall_clock}, core_index{core_index} { |
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const auto arch = architecture == Arch::AArch32 ? UC_ARCH_ARM : UC_ARCH_ARM64; |
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CHECKED(uc_open(arch, UC_MODE_ARM, &uc)); |
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auto fpv = 3 << 20; |
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_CPACR_EL1, &fpv)); |
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uc_hook hook{}; |
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CHECKED(uc_hook_add(uc, &hook, UC_HOOK_INTR, (void*)InterruptHook, this, 0, UINT64_MAX)); |
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CHECKED(uc_hook_add(uc, &hook, UC_HOOK_MEM_INVALID, (void*)UnmappedMemoryHook, &system, 0, |
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UINT64_MAX)); |
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if (GDBStub::IsServerEnabled()) { |
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CHECKED(uc_hook_add(uc, &hook, UC_HOOK_CODE, (void*)CodeHook, this, 0, UINT64_MAX)); |
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last_bkpt_hit = false; |
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} |
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} |
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ARM_Unicorn::~ARM_Unicorn() { |
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CHECKED(uc_close(uc)); |
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} |
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void ARM_Unicorn::SetPC(u64 pc) { |
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_PC, &pc)); |
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} |
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u64 ARM_Unicorn::GetPC() const { |
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u64 val{}; |
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_PC, &val)); |
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return val; |
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} |
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u64 ARM_Unicorn::GetReg(int regn) const { |
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u64 val{}; |
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auto treg = UC_ARM64_REG_SP; |
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if (regn <= 28) { |
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treg = (uc_arm64_reg)(UC_ARM64_REG_X0 + regn); |
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} else if (regn < 31) { |
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treg = (uc_arm64_reg)(UC_ARM64_REG_X29 + regn - 29); |
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} |
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CHECKED(uc_reg_read(uc, treg, &val)); |
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return val; |
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} |
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void ARM_Unicorn::SetReg(int regn, u64 val) { |
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auto treg = UC_ARM64_REG_SP; |
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if (regn <= 28) { |
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treg = (uc_arm64_reg)(UC_ARM64_REG_X0 + regn); |
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} else if (regn < 31) { |
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treg = (uc_arm64_reg)(UC_ARM64_REG_X29 + regn - 29); |
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} |
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CHECKED(uc_reg_write(uc, treg, &val)); |
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} |
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u128 ARM_Unicorn::GetVectorReg(int /*index*/) const { |
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UNIMPLEMENTED(); |
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static constexpr u128 res{}; |
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return res; |
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} |
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void ARM_Unicorn::SetVectorReg(int /*index*/, u128 /*value*/) { |
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UNIMPLEMENTED(); |
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} |
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u32 ARM_Unicorn::GetPSTATE() const { |
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u64 nzcv{}; |
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &nzcv)); |
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return static_cast<u32>(nzcv); |
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} |
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void ARM_Unicorn::SetPSTATE(u32 pstate) { |
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u64 nzcv = pstate; |
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &nzcv)); |
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} |
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VAddr ARM_Unicorn::GetTlsAddress() const { |
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u64 base{}; |
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_TPIDRRO_EL0, &base)); |
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return base; |
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} |
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void ARM_Unicorn::SetTlsAddress(VAddr base) { |
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_TPIDRRO_EL0, &base)); |
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} |
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u64 ARM_Unicorn::GetTPIDR_EL0() const { |
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u64 value{}; |
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_TPIDR_EL0, &value)); |
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return value; |
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} |
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void ARM_Unicorn::SetTPIDR_EL0(u64 value) { |
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_TPIDR_EL0, &value)); |
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} |
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void ARM_Unicorn::ChangeProcessorID(std::size_t new_core_id) { |
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core_index = new_core_id; |
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} |
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void ARM_Unicorn::Run() { |
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if (GDBStub::IsServerEnabled()) { |
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ExecuteInstructions(std::max(4000000U, 0U)); |
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} else { |
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while (true) { |
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if (interrupt_handlers[core_index].IsInterrupted()) { |
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return; |
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} |
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ExecuteInstructions(10); |
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} |
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} |
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} |
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void ARM_Unicorn::Step() { |
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ExecuteInstructions(1); |
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} |
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MICROPROFILE_DEFINE(ARM_Jit_Unicorn, "ARM JIT", "Unicorn", MP_RGB(255, 64, 64)); |
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void ARM_Unicorn::ExecuteInstructions(std::size_t num_instructions) { |
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MICROPROFILE_SCOPE(ARM_Jit_Unicorn); |
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// Temporarily map the code page for Unicorn
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u64 map_addr{GetPC() & ~Memory::PAGE_MASK}; |
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std::vector<u8> page_buffer(Memory::PAGE_SIZE); |
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system.Memory().ReadBlock(map_addr, page_buffer.data(), page_buffer.size()); |
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CHECKED(uc_mem_map_ptr(uc, map_addr, page_buffer.size(), |
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UC_PROT_READ | UC_PROT_WRITE | UC_PROT_EXEC, page_buffer.data())); |
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CHECKED(uc_emu_start(uc, GetPC(), 1ULL << 63, 0, num_instructions)); |
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CHECKED(uc_mem_unmap(uc, map_addr, page_buffer.size())); |
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if (GDBStub::IsServerEnabled()) { |
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if (last_bkpt_hit && last_bkpt.type == GDBStub::BreakpointType::Execute) { |
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uc_reg_write(uc, UC_ARM64_REG_PC, &last_bkpt.address); |
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} |
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Kernel::Thread* const thread = system.CurrentScheduler().GetCurrentThread(); |
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SaveContext(thread->GetContext64()); |
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if (last_bkpt_hit || GDBStub::IsMemoryBreak() || GDBStub::GetCpuStepFlag()) { |
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last_bkpt_hit = false; |
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GDBStub::Break(); |
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GDBStub::SendTrap(thread, 5); |
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} |
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} |
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} |
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void ARM_Unicorn::SaveContext(ThreadContext64& ctx) { |
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int uregs[32]; |
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void* tregs[32]; |
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_SP, &ctx.sp)); |
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_PC, &ctx.pc)); |
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &ctx.pstate)); |
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for (auto i = 0; i < 29; ++i) { |
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uregs[i] = UC_ARM64_REG_X0 + i; |
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tregs[i] = &ctx.cpu_registers[i]; |
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} |
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uregs[29] = UC_ARM64_REG_X29; |
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tregs[29] = (void*)&ctx.cpu_registers[29]; |
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uregs[30] = UC_ARM64_REG_X30; |
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tregs[30] = (void*)&ctx.cpu_registers[30]; |
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CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31)); |
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for (int i = 0; i < 32; ++i) { |
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uregs[i] = UC_ARM64_REG_Q0 + i; |
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tregs[i] = &ctx.vector_registers[i]; |
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} |
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CHECKED(uc_reg_read_batch(uc, uregs, tregs, 32)); |
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} |
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void ARM_Unicorn::LoadContext(const ThreadContext64& ctx) { |
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int uregs[32]; |
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void* tregs[32]; |
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_SP, &ctx.sp)); |
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_PC, &ctx.pc)); |
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &ctx.pstate)); |
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for (int i = 0; i < 29; ++i) { |
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uregs[i] = UC_ARM64_REG_X0 + i; |
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tregs[i] = (void*)&ctx.cpu_registers[i]; |
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} |
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uregs[29] = UC_ARM64_REG_X29; |
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tregs[29] = (void*)&ctx.cpu_registers[29]; |
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uregs[30] = UC_ARM64_REG_X30; |
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tregs[30] = (void*)&ctx.cpu_registers[30]; |
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CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31)); |
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for (auto i = 0; i < 32; ++i) { |
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uregs[i] = UC_ARM64_REG_Q0 + i; |
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tregs[i] = (void*)&ctx.vector_registers[i]; |
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} |
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CHECKED(uc_reg_write_batch(uc, uregs, tregs, 32)); |
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} |
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void ARM_Unicorn::PrepareReschedule() { |
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CHECKED(uc_emu_stop(uc)); |
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} |
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void ARM_Unicorn::ClearExclusiveState() {} |
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void ARM_Unicorn::ClearInstructionCache() {} |
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void ARM_Unicorn::RecordBreak(GDBStub::BreakpointAddress bkpt) { |
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last_bkpt = bkpt; |
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last_bkpt_hit = true; |
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} |
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void ARM_Unicorn::InterruptHook(uc_engine* uc, u32 int_no, void* user_data) { |
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u32 esr{}; |
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CHECKED(uc_reg_read(uc, UC_ARM64_REG_ESR, &esr)); |
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const auto ec = esr >> 26; |
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const auto iss = esr & 0xFFFFFF; |
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auto* const arm_instance = static_cast<ARM_Unicorn*>(user_data); |
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switch (ec) { |
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case 0x15: // SVC
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Kernel::Svc::Call(arm_instance->system, iss); |
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break; |
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} |
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} |
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} // namespace Core
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@ -1,63 +0,0 @@ |
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// Copyright 2018 yuzu emulator team |
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// Licensed under GPLv2 or any later version |
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// Refer to the license.txt file included. |
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#pragma once |
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#include <unicorn/unicorn.h> |
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#include "common/common_types.h" |
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#include "core/arm/arm_interface.h" |
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#include "core/gdbstub/gdbstub.h" |
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namespace Core { |
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class System; |
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class ARM_Unicorn final : public ARM_Interface { |
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public: |
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enum class Arch { |
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AArch32, // 32-bit ARM |
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AArch64, // 64-bit ARM |
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}; |
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explicit ARM_Unicorn(System& system, CPUInterrupts& interrupt_handlers, bool uses_wall_clock, |
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Arch architecture, std::size_t core_index); |
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~ARM_Unicorn() override; |
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void SetPC(u64 pc) override; |
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u64 GetPC() const override; |
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u64 GetReg(int index) const override; |
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void SetReg(int index, u64 value) override; |
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u128 GetVectorReg(int index) const override; |
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void SetVectorReg(int index, u128 value) override; |
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u32 GetPSTATE() const override; |
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void SetPSTATE(u32 pstate) override; |
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VAddr GetTlsAddress() const override; |
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void SetTlsAddress(VAddr address) override; |
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void SetTPIDR_EL0(u64 value) override; |
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u64 GetTPIDR_EL0() const override; |
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void ChangeProcessorID(std::size_t new_core_id) override; |
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void PrepareReschedule() override; |
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void ClearExclusiveState() override; |
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void ExecuteInstructions(std::size_t num_instructions); |
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void Run() override; |
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void Step() override; |
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void ClearInstructionCache() override; |
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void PageTableChanged(Common::PageTable&, std::size_t) override {} |
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void RecordBreak(GDBStub::BreakpointAddress bkpt); |
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void SaveContext(ThreadContext32& ctx) override {} |
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void SaveContext(ThreadContext64& ctx) override; |
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void LoadContext(const ThreadContext32& ctx) override {} |
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void LoadContext(const ThreadContext64& ctx) override; |
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private: |
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static void InterruptHook(uc_engine* uc, u32 int_no, void* user_data); |
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uc_engine* uc{}; |
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GDBStub::BreakpointAddress last_bkpt{}; |
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bool last_bkpt_hit = false; |
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std::size_t core_index; |
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}; |
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} // namespace Core |
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