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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell { |
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void TranslatorVisitor::PSETP(u64 insn) { |
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union { |
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u64 raw; |
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BitField<0, 3, IR::Pred> dest_pred_b; |
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BitField<3, 3, IR::Pred> dest_pred_a; |
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BitField<12, 3, IR::Pred> pred_a; |
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BitField<15, 1, u64> neg_pred_a; |
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BitField<24, 2, BooleanOp> bop_1; |
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BitField<29, 3, IR::Pred> pred_b; |
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BitField<32, 1, u64> neg_pred_b; |
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BitField<39, 3, IR::Pred> pred_c; |
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BitField<42, 1, u64> neg_pred_c; |
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BitField<45, 2, BooleanOp> bop_2; |
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} const pset{insn}; |
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const IR::U1 pred_a{ir.GetPred(pset.pred_a, pset.neg_pred_a != 0)}; |
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const IR::U1 pred_b{ir.GetPred(pset.pred_b, pset.neg_pred_b != 0)}; |
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const IR::U1 pred_c{ir.GetPred(pset.pred_c, pset.neg_pred_c != 0)}; |
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const IR::U1 lhs_a{PredicateCombine(ir, pred_a, pred_b, pset.bop_1)}; |
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const IR::U1 lhs_b{PredicateCombine(ir, ir.LogicalNot(pred_a), pred_b, pset.bop_1)}; |
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const IR::U1 result_a{PredicateCombine(ir, lhs_a, pred_c, pset.bop_2)}; |
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const IR::U1 result_b{PredicateCombine(ir, lhs_b, pred_c, pset.bop_2)}; |
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ir.SetPred(pset.dest_pred_a, result_a); |
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ir.SetPred(pset.dest_pred_b, result_b); |
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} |
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} // namespace Shader::Maxwell
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